Thesis (Ph. D. in Interdisciplinary Materials Science)--Vanderbilt University, May 2008. / Title from title screen. Includes bibliographical references.

Thesis (M.S.)--University of Alabama at Birmingham, 2008. / Description based on contents viewed Feb. 11, 2009; title from PDF t.p. Includes bibliographical references (p. 49-50).

Measurements of the high temperature dielectric properties of ceramic materials at microwave frequencies have been made using two different experimental techniques.Data has been collected at frequencies from O.2GHz to 4.0GHz and for sample temperatures up to 1200°C. Detailed cross checking of the high temperature dielectric data obtained by the two techniques has been carried out with the help of other laboratories worldwide. An investigation of the applicability of dielectric mixture equations to practical measurement techniques is reported. The most reliabl~ estimates of permittivity were given by the Landau-Lifshitz, Looyenga equation or by a cube root extrapolation technique.Permittivity data obtained for a series of yttria stabilised zirconia samples, three differently processed silicon nitride samples and ten related glass compositions are presented. Analysis of the frequency and temperature dependence of both components of complex permittivity has been undertaken· in an attempt to identify the physical origins of the dielectric loss mechanisms. For the yttria doped zirconia samples results indicate two distinct loss mechanisms dominant over different temperature ranges. Below approximately 950K a hopping model involving short range motion of oxygen vacancies around fixed dopant ions is proposed. Above 950K thermally activated quantum mechanical tunneling of electrons is suggested as the dominant mechanism. A single loss mechanism for the entire temperature range involving the lattice loss of the silicon nitride network itself is indicated from the measurements of the hot pressed and pressureless sintered silicon nitride samples. For the reaction bonded silicon nitride samples there is evidence of a second loss mechanism due to additional ion impurities above 1410K. The measurements on the oxide glass systems add support to the belief that + 1 charged metal ions will dominate the dielectric properties of glass systems when present. The loss process has an increasing activation energy with increasing temperature which is seen to be consistent with ionic motion within the previously proposed random potential energy model. Differences in the complex permittivity with composition are attributed to variation in ionic size and metal ion-oxygen ion bond strength.

No description available.

No description available.

Graduation date: 1997

Thesis (M.C.E.)--University of Delaware, 2006. / Principal faculty advisor: James Kolodzey, Dept. of Electrical and Computer Engineering. Includes bibliographical references.

No description available.

This thesis is to research connection process of multi-level conductor in integration circuits (ICs) manufacture technology. For the sake of sub-micro ICs which is gazed by people in the future, device¡¦s dimension have to be scaled down unceasingly; besides, the design of conductor connection of multi-level metal is also to be adopted for ULSI technology. However, the number of metal connection layer is increasing as well as the distance between wires is shorter and shorter, which leads to the fact that the RC delay time of metal interconnection is the primary reason of limiting the speed of semiconductor device while electronic signal is delivered among metal interconnection. In order to lower delay time of signal propagation, there are two parts in the following: In the aspect of lowering resistance, we substitute copper (resistance is 1.7£g£[-cm) at present for aluminum (resistance is 2.7£g£[-cm ) in the past so as to make copper be the wire for interconnection system. Furthermore, the scaled down device not only increase the current density of the wire but also increase the severity of electromigration inside the wire. Copper atoms are so heavier than aluminum atoms that copper atoms can restrain electromigration appropriately. In the aspect of decreasing capacitance, we will develop low dielectric constant (low-k). But copper with Damascene manufacture under the conditions of external operation such as temperature and electric field give rise to the fact that Cu diffuses into low-k material so easily that copper and low-k interact, which deteriorates the characteristic of the material¡Braises the leakage current and leads to the breakdown of the dielectric material. Therefore, it must be an important topic for study that we search for the dielectric barrier material with the characteristic against copper diffusion under the demand coinciding with integration process compatibility. At present, because of the material film called silicon carbide with low dielectric constant (k=4~6) attracts a lot of people¡¦s eyes deeply, it can applied to dielectric barrier technology to replace traditional dielectric barrier silicon nitride with high dielectric constant (k~8) for the purpose of alleviating delay time of the wire system. This thesis will discuss fundamental characteristics of silicon carbide film and some problems during the integration process. For instance, the impacts on silicon carbide under the conditions of fluorine plasma and thermal treatment; furthermore, this thesis will research the electric problems from the integration of low-k dielectric barrier and copper wire as well as probes into mechanism of leakage current.

Recent technological advances have allowed silicon (Si) semiconductor technology to approach the theoretical limits of the Si material; however, power device requirements for many applications are at a stage that the present Si-based power devices cannot handle. The requirements include higher blocking voltages, switching frequencies, efficiency, and reliability. Material technologies superior to Si are needed for future power device developments. Silicon Carbide (SiC) based semiconductor devices offer one such alternative. SiC based power devices exhibit superior properties such as very low switching losses, fast switching behavior, improved reliability and high temperature operation capabilities. Power factor correction stage of power supplies is identified as an area where application of these devices would prove advantageous. In this thesis a high performance, high efficiency, SiC based power factor correction stage is discussed. The proposed topology takes advantage of the superior properties of SiC semiconductor based devices and the reduced number of devices that the dual boost power factor correction topology requires to achieve high efficiency, small size and better performance at high temperature. In addition to this analysis of SiC based power devices is carried out to study their characteristics and performance.