Thesis (M.S.)--Air Force Institute of Technology, 2008. / Title from title screen (viewed Nov. 18, 2008). "March 2008." "AFIT/GRD/ENC/08M-01." "ADA482546"--URL. Includes bibliographical references (p. 126-132). Also issued in paper format.

Thesis (M.S. in Astronautical Engineering)--Naval Postgraduate School, September 2006. / "September 2006." Thesis advisor: Romano, Marcello. Performed by Naval Postgraduate School, Monterey, CA. Includes bibliographical references (p. 73-74). Also available online from the Naval Postgraduate School (NPS), Dudley Knox Library site and the DTIC Online site.

Thesis (M.S. in Aeronautical Engineering)--Naval Postgraduate School, September 1990. / Thesis Advisor(s): Henline, William D. ; Platzer, Max F. Second Reader: Chandrasekhara, M. S. "September 1990." Description based on title screen as viewed on December 21, 2009. DTIC Identifier(s): Ceramic materials, ablative materials, heat shields, reusable equipment, space flight, thermal insulation, atmospheric entry, hypersonic flow, Mars probes, arc heaters, melting, glass, RSI (reusable surface insulaiton), aerodynamic heating, stagnation pressure, mathematical prediction, theses. Author(s) subject terms: Ablative, hypersonic, NASA, Mars, heat shield. Includes bibliographical references (p. 110). Also available in print.

Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1999. / Cover title. Computer printout. Abstract. Includes bibliographical references (p. [103]-112). Available electronically via Internet.

Submitted by PPG Engenharia El?trica (engenharia.pg.eletrica@pucrs.br) on 2018-10-31T13:57:50Z No. of bitstreams: 1 SILVIO CESAR ANTUNES DUTRA_DIS.pdf: 2550584 bytes, checksum: 3dae5cef4ef20b66d5c7a4db79ae5cad (MD5) / Approved for entry into archive by Sheila Dias (sheila.dias@pucrs.br) on 2018-11-01T11:50:43Z (GMT) No. of bitstreams: 1 SILVIO CESAR ANTUNES DUTRA_DIS.pdf: 2550584 bytes, checksum: 3dae5cef4ef20b66d5c7a4db79ae5cad (MD5) / Made available in DSpace on 2018-11-01T12:00:28Z (GMT). No. of bitstreams: 1 SILVIO CESAR ANTUNES DUTRA_DIS.pdf: 2550584 bytes, checksum: 3dae5cef4ef20b66d5c7a4db79ae5cad (MD5) Previous issue date: 2018-08-31 / Power converters are widely used in the context of power electronics. In the same way that transformers have a fundamental role in applications involving AC circuits, power converters modify voltage magnitudes in DC circuits. These devices can either present an output voltage higher than the input voltage, acting as a Boost converter, or lower, acting, in this case, as a Buck converter. The input and output signals can also present either a voltage source or a current source behavior, depending on the topology. This work presents a systematic study of the D converter operating in the continuous conduction mode, in permanent regime, including the qualitative and quantitative analyzes, resulting in a methodology of dimensioning of the converter, as well as its modeling in space of states, which makes feasible studies of control strategies for it. Although this is not a new topology, this converter has recently been reintroduced due to its ability to increase efficiency in the energy conversion process, especially in photovoltaic systems. However, this research is fully justified given the lack of similar work for the D converter topology. This study was validated from tests performed in the PSIM simulation software, in addition to MATLAB / SIMULINK. A laboratory prototype was specially constructed for validation purposes in a rapid prototyping platform, as well as the consequent implementation in a PCI, for use in future works. / Os conversores est?ticos s?o amplamente utilizados no contexto da eletr?nica de pot?ncia. Da mesma forma que os transformadores t?m papel fundamental nas aplica??es que envolvem circuitos alimentados em corrente alternada, os conversores est?ticos realizam a transforma??o de magnitudes de tens?o em circuitos de corrente cont?nua. Tais dispositivos podem tanto apresentar em sua sa?da um valor de tens?o superior em rela??o ao sinal de entrada, atuando como elevadores, quanto inferior, atuando, neste caso, como redutores. Estes tamb?m podem apresentar suas sa?das ou entradas com um comportamento de fonte de tens?o ou corrente, dependendo da topologia utilizada. Este trabalho apresenta um estudo sistematizado do conversor D operando no modo de condu??o cont?nua, em regime permanente, incluindo as an?lises qualitativa e quantitativa, resultando em uma metodologia de dimensionamento do conversor, bem como a sua modelagem em espa?o de estados, o que viabiliza estudos de estrat?gias de controle para o mesmo. Apesar de n?o se tratar de uma nova topologia, recentemente este conversor foi reintroduzido, devido a sua capacidade de aumentar a efici?ncia no processo de convers?o de energia, especialmente em sistemas fotovoltaicos. Esta pesquisa encontra justificativa dada a inexist?ncia de trabalhos semelhantes especificamente para a topologia do conversor D. Este estudo foi validado a partir de ensaios realizados no software de simula??o PSIM, al?m do MATLAB/SIMULINK. Um prot?tipo de laborat?rio foi especialmente constru?do para fins de valida??o em uma plataforma de prototipagem r?pida, bem como a consequente implementa??o do mesmo em uma PCI, para utiliza??o em trabalhos futuros.

Cyber attacks can target any nodes of the space infrastructure, and while these attacks are called non-violent, there is a credible capability to use cyber attacks to cause direct or indirect physical damage, injury or death. However, the vulnerability of satellites and other space assets to cyber attack is often overlooked, which is a significant failing given society's substantial and ever increasing reliance on satellite technologies. Through a policy analysis, this dissertation assess the set of political provisions provided by the European Union to address the cyber security issue of the space infrastructure. Such study aims at exploring the geopolitical consequences linked to space cyber security risks, and at assessing the political preparedness of the European Union to address these challenges. The perspective of transatlantic cooperation to further support both American and European effort to tackle this security risk is also addressed. The overarching value of the study is to contribute to future European cyber security for space and transatlantic debates by providing useful perspectives and key takeaways on these two domains. Ultimately, he existing set of policies are not sufficient to address the cyber security issue in Outer Space, a unified approach by the European Union and the United...

Un des plus grands défis dans la conception matérielle et logicielle est de s’assurer que le système soit exempt d’erreurs. La moindre erreur dans les systèmes embarqués réactifs peut avoir des conséquences désastreuses et coûteuses pour certains projets critiques, nécessitant parfois de gros investissements pour les corriger, ou même conduire à un échec spectaculaire et inattendu du système. Prévenir de tels phénomènes en identifiant tous les comportements critiques du système est une tâche assez délicate. Les tests en industrie sont globalement non exhaustifs, tandis que la vérification formelle souffre souvent du problème d’explosion combinatoire. Nous présentons dans ce contexte une nouvelle approche de génération exhaustive de jeux de test qui combine les principes du test industriel et de la vérification formelle académique. Notre approche construit un modèle générique du système étudié à partir de l’approche synchrone. Le principe est de se limiter à l’analyse locale des sous-espaces significatifs du modèle. L’objectif de notre approche est d’identifier et extraire les conditions préalables à l’exécution de chaque chemin du sous-espace étudie. Il s’agit ensuite de générer tout les cas de tests possibles à partir de ces pré-conditions. Notre approche présente un algorithme de quasi-aplatissement plus simple et efficace que les techniques existantes ainsi qu’une compilation avantageuse favorisant une réduction considérable du problème de l’explosion de l’espace d’états. Elle présente également une manipulation symbolique des données numériques permettant un test plus expressif et concret du système étudié. / One of the biggest challenges in hardware and software design is to ensure that a system is error-free. Small errors in reactive embedded systems can have disastrous and costly consequences for a project. Preventing such errors by identifying the most probable cases of erratic system behavior is quite challenging. Indeed, tests in industry are overall non-exhaustive, while formal verification in scientific research often suffers from combinatorial explosion problem. We present in this context a new approach for generating exhaustive test sets that combines the underlying principles of the industrial test technique and the academic-based formal verification approach. Our approach builds a generic model of the system under test according to the synchronous approach. The goal is to identify the optimal preconditions for restricting the state space of the model such that test generation can take place on significant subspaces only. So, all the possible test sets are generated from the extracted subspace preconditions. Our approach exhibits a simpler and efficient quasi-flattening algorithm compared with existing techniques and a useful compiled internal description to check security properties and reduce the state space combinatorial explosion problem. It also provides a symbolic processing technique of numeric data that provides a more expressive and concrete test of the system. We have implemented our approach on a tool called GAJE. To illustrate our work, this tool was applied to verify an industrial project on contactless smart cards security.