<p>This thesis concludes the evaluation of a new high level programming language for stream applications, StreamBits. The goal with the project is to evaluate the programmability, with the focus on expressing machine-independent parallelism and bit-level computations in StreamBits. As of now, the programming language is prototyped in a Java framework. This project also involves improvement and expansion of this framework.</p><p>An examination of the framework was conducted. The conclusions of this examination was the foundation of the changes implemented in the framework during the improvement and expansion part of this project. Evaluation experiments were done using the improved version of the framework. The evaluation was based on a comparison of programs implemented in StreamBits and another programming language typically used by industry for this kind of applications. The focus of the evaluation was to evaluate how well the new data-types and stream constructs of StreamBits can be used and expressed compared to other languages.</p><p>The results are partly the improvements and expansion of the framework, partly the results of the tests conducted during the evaluation. Results show that the new data-types and stream constructs of StreamBits are valuable additions to a stream programming language. The data-types and stream constructs assists the programmer to write source code that is not closely bound to a specific architecture.</p>

<p>Portable stream programming language (PSPL) is a language for baseband application</p><p>programming on reconfigurable architectures. The first step in its development has been</p><p>completed. A parser has been provided for the front end of the PSPL compiler. The syntax</p><p>of the language has been fixed to allow for easy parses. The scanner and the parser</p><p>where generated using automatic tools (scanner and parser generators) which rely on</p><p>complex mathematical algorithms for their generation. Abstract syntax (data structures</p><p>that preserve the source program so that program structure is evident) was implemented</p><p>for the parser using a syntax separate from interpretation style of programming. Tests were</p><p>carried out to ensure that the correct data structures were generated. The final outcome</p><p>is a parser that other phases of the compiler can depend on for onward transmission of</p><p>the source program in an unambiguous manner. The development of subsequent phases</p><p>of the compiler will form the next logical step in the processes of transforming PSPL to</p><p>a stand alone language.</p>

This thesis concludes the evaluation of a new high level programming language for stream applications, StreamBits. The goal with the project is to evaluate the programmability, with the focus on expressing machine-independent parallelism and bit-level computations in StreamBits. As of now, the programming language is prototyped in a Java framework. This project also involves improvement and expansion of this framework. An examination of the framework was conducted. The conclusions of this examination was the foundation of the changes implemented in the framework during the improvement and expansion part of this project. Evaluation experiments were done using the improved version of the framework. The evaluation was based on a comparison of programs implemented in StreamBits and another programming language typically used by industry for this kind of applications. The focus of the evaluation was to evaluate how well the new data-types and stream constructs of StreamBits can be used and expressed compared to other languages. The results are partly the improvements and expansion of the framework, partly the results of the tests conducted during the evaluation. Results show that the new data-types and stream constructs of StreamBits are valuable additions to a stream programming language. The data-types and stream constructs assists the programmer to write source code that is not closely bound to a specific architecture.

Portable stream programming language (PSPL) is a language for baseband application programming on reconfigurable architectures. The first step in its development has been completed. A parser has been provided for the front end of the PSPL compiler. The syntax of the language has been fixed to allow for easy parses. The scanner and the parser where generated using automatic tools (scanner and parser generators) which rely on complex mathematical algorithms for their generation. Abstract syntax (data structures that preserve the source program so that program structure is evident) was implemented for the parser using a syntax separate from interpretation style of programming. Tests were carried out to ensure that the correct data structures were generated. The final outcome is a parser that other phases of the compiler can depend on for onward transmission of the source program in an unambiguous manner. The development of subsequent phases of the compiler will form the next logical step in the processes of transforming PSPL to a stand alone language.

Stream programming is a paradigm where a program is structured by a set of computational nodes connected by streams. Focusing on data moving between computational nodes via streams, this programming model fits well for applications that process long sequences of data. We call such applications reactive stream programs (RSPs) to distinguish them from stream programs with rather small and finite input data. In stream programming, concurrency is expressed implicitly via communication streams. This helps to reduce the complexity of parallel programming. For this reason, stream programming has gained popularity as a programming model for parallel platforms. However, it is also challenging to analyse and improve the performance without an understanding of the program's internal behaviour. This thesis targets an effi cient execution model for deploying RSPs on parallel platforms. This execution model includes a monitoring framework to understand the internal behaviour of RSPs, scheduling strategies for RSPs on uniform shared-memory platforms; and mapping techniques for deploying RSPs on heterogeneous distributed platforms. The foundation of the execution model is based on a study of the performance of RSPs in terms of throughput and latency. This study includes quantitative formulae for throughput and latency; and the identification of factors that influence these performance metrics. Based on the study of RSP performance, this thesis exploits characteristics of RSPs to derive effective scheduling strategies on uniform shared-memory platforms. Aiming to optimise both throughput and latency, these scheduling strategies are implemented in two heuristic-based schedulers. Both of them are designed to be centralised to provide load balancing for RSPs with dynamic behaviour as well as dynamic structures. The first one uses the notion of positive and negative data demands on each stream to determine the scheduling priorities. This scheduler is independent from the runtime system. The second one requires the runtime system to provide the position information for each computational node in the RSP; and uses that to decide the scheduling priorities. Our experiments show that both schedulers provides similar performance while being significantly better than a reference implementation without dynamic load balancing. Also based on the study of RSP performance, we present in this thesis two new heuristic partitioning algorithms which are used to map RSPs onto heterogeneous distributed platforms. These are Kernighan-Lin Adaptation (KLA) and Congestion Avoidance (CA), where the main objective is to optimise the throughput. This is a multi-parameter optimisation problem where existing graph partitioning algorithms are not applicable. Compared to the generic meta-heuristic Simulated Annealing algorithm, both proposed algorithms achieve equally good or better results. KLA is faster for small benchmarks while slower for large ones. In contrast, CA is always orders of magnitudes faster even for very large benchmarks.

In computing the available computing power has continuously fallen short of the demanded computing performance. As a consequence, performance improvement has been the main focus of processor design. However, due to the phenomenon called 'Power Wall' it has become infeasible to build faster processors by just increasing the processor's clock speed. One of the resulting trends in hardware design is to integrate several simple and power-efficient cores on the same chip. This design shift poses challenges of its own. In the past, with increasing clock frequency the programs became automatically faster as well without modifications. This is no longer true with many-core architectures. To achieve maximum performance the programs have to run concurrently on more than one core, which forces the general computing paradigm to become increasingly parallel to leverage maximum processing power. In this thesis, we will focus on the Reactive Stream Program (RSP). In stream processing, the system consists of computing nodes, which are connected via communication streams. These streams simplify the concurrency management on modern many-core architectures due to their implicit synchronisation. RSP is a stream processing system that implements the reactive system. The RSPs work in tandem with their environment and the load imposed by the environment may vary over time. This provides a unique opportunity to increase performance per watt. In this thesis the research contribution focuses on the design of the execution layer to run RSPs on tiled many-core architectures, using the Intel's Single-chip Cloud Computer (SCC) processor as a concrete experimentation platform. Further, we have developed a Dynamic Voltage and Frequency Scaling (DVFS) technique for RSP deployed on many-core architectures. In contrast to many other approaches, our DVFS technique does not require the capability of controlling the power settings of individual computing elements, thus making it applicable for modern many-core architectures, with which power can be changed only for power islands. The experimental results confirm that the proposed DVFS technique can effectively improve the energy efficiency, i.e. increase the performance per watt, for RSPs.