This paper is a description of the analysis and testing of a method to estimate noise mixed in with a desired signal and to then subtract out the estimated noise. The paper documents the situation in which noise becomes a problem, the method of noise elimination, the mathematics used to analyze the noise eliminator, a digital/analog hybrid simulation of a system utilizing the techniques described, and comparative results between expected performance and actual system performance. Also described is the practicality of the system, the limitations of the system and its unique capabilities. Since the system is a totally new concept, it was being developed for the writing of this thesis. Therefore many changes were implemented with respect to the original design. These modifications are documented along with the reasons for the deviations from the original idea. Conclusions and a summary are provided. Several suggestions as to where the system would be beneficial are also supplied.

Thesis (Master of Science in Electrical Engineering)--Naval Postgraduate School, December 1990. / Thesis Advisor: Myers, Glen A. Second Reader: Ha, Tri T. "December 1990." Description based on title screen as viewed on March 30, 2010. DTIC Identifier(s): Antijamming, multipath transmission, frequency hopping, satellite communications, interference, noise, theses. Author(s) subject terms: Frequency hopping, satellite communications. Includes bibliographical references (p. 44). Also available in print.

Timing jitter and phase noise are important design considerations in most electronic systems, particularly communication systems. The desire for faster transmission speeds and higher levels of integration, combined with lower signal levels and denser circuit boards has placed greater emphasis on managing problems related to phase noise, timing jitter, and timing distribution. This thesis reports original work on phase noise modelling in electronic systems. A new model is proposed which predicts the up-conversion of baseband noise to the carrier frequency in RF amplifiers. The new model is validated by comparing the predicted phase noise performance to experimental measurements as it applies to a common emitter (CE), bipolar junction transistor (BJT) amplifier. The results show that the proposed model correctly predicts the measured phase noise, including the shaping of the noise about the carrier frequency, and the dependence of phase noise on the amplifier parameters. In addition, new work relating to timing transfer in digital communication systems is presented. A new clock recovery algorithm is proposed for decoding timing information encoded using the synchronous residual time-stamp (SRTS) method. Again, theoretical analysis is verified by comparison with an experimental implementation. The results show that the new algorithm correctly recovers the source clock at the destination, and satisfies the jitter specification set out by the ITU-T for G.702 signals.