This paper architecturally describes the switching portion of a digital communications system that is dedicated to conferencing. The basic ideas and methods of circuit switching and packet switching are introduced. The conferencing function is described, and some resulting design considerations are discussed. The architecture of the switch is then presented. Circuit switching techniques are used throughout the architecture of the switch, coupled with arithmetic processing to accomplish the conferencing function. The architecture is developed in such a way that it is expandable in all directions to meet a given set of requirements. The requirements include the number of users the system supports and the number of conference channels provided. The processing stages of the switch can be sized based on these requirements and the chosen component speeds. The basic timing of each stage is given to describe its operation and establish the critical delay paths. The resulting switching methods first introduced. The switch is also tested to see if it fits the criteria for being a distributed processing system. It is concluded that if the provision for dynamic reconfiguration is added, the switch fits the criteria. Finally, further topics of study are suggested.