In this work, a new deinterleaving algorithm that can be used as a part of an ESM system and its implementation by using an FPGA is studied. The function of the implemented algorithm is interpreting the complex electromagnetic military field in order to detect and determine different RADARs and their types by using incoming RADAR pulses and their PDWs. It is assumed that RADAR signals in the space are received clearly and PDW of each pulse is generated as an input to the implemented algorithm system. Clustering analysis and a new interpreting process is used to deinterleave the RADAR pulses. In order to implement the algorithm, FPGA is used for achieving a faster and more efficient system. Comparison of the new algorithm and the previous deinterleaving studies is done. The simulation results are shown and discussed in detail.

Diversity methods are used to improve the reliability of the communication between transmitter and receiver. These methods use redundancy to reduce the errors in the communication link. Apart from the conventional diversity methods, multiuser diversity has an aim of maximizing the sum capacity of a multi-user system. To benefit from multiuser diversity, the opportunistic scheduling method grants the channel access to the user which has the best channel quality among all users. Therefore, the cumulative sum of the information sent to all users, which is the sum capacity, is maximized in the long term. Although the opportunistic scheduling maximizes the sum capacity, it has some drawbacks such as the feedback load growing with the number of users and the problem of fairness for the users which may have lower channel quality than some other users. In this thesis, these two issues are investigated for the broadcast channels. Feedback quantization, which gives partial information on the channel state, is studied to mitigate the feedback load with a goal of little loss in the sum capacity. The thresholds for the finite feedback quantization are determined to provide fairness and to reduce the feedback load at the same time. To provide fairness, users are grouped into clusters and thresholds are optimized for each cluster. A method is proposed by extending the one given by Floren et. al. to solve the mentioned problems and the proposed method is compared with some other scheduling methods in the literature.

In this thesis, parametric study and design of Vivaldi antennas and arrays are studied. The parameters of single element antennas and arrays are investigated regarding their effects on the design. The return loss responses and radiation patterns are considered in the parametric study. The results of simulations realized using Ansoft HFSS, a high frequency electromagnetic field simulation program, are shown and discussed. Two different Vivaldi antennas operating in 8.5-10.5 GHz frequency band with return loss responses better than 15 dB are designed based on the results of parametric study. Stripline to slotline transition is used in the feeding section of both antennas. In the same manner, two different 8-element uniform linear arrays operating in 8.5-10.5 GHz with half power beam widths smaller than 12&amp / #730 / and side lobe levels smaller than 13 dB are designed. Binomial and Dolph-Chebyshev feeding techniques are also investigated in order to improve half power beamwidths and side lobe levels of the designed arrays. The designed single element Vivaldi antennas and a linear array of Vivaldi antennas are fabricated. The return loss response and radiation patterns of the fabricated antennas and the array are measured and compared with the simulation results.

In this thesis, a Neural Network (NN) based beamforming algorithm is proposed for real time target tracking problem. The algorithm is performed for two applications, linear and cylindrical arrays. The linear array application is implemented with equispaced omnidirectional sources. The influence of the number of antenna elements and the angular seperation between the incoming signals on the performance of the beamformer in the linear array beamformer is studied, and it is observed that the algorithm improves its performance by increasing both two parameters in linear array beamformer. The cylindrical array application is implemented with twelve microstrip patch antenna (MPA) elements. The angular range of interest is divided into twelve sectors. Since three MPA elements are used to form the beam in each sector, the input size of the neural network (NN) is reduced in cylindrical array. According to the reduced size of NN, the training time of the beamformer is decreased. The reduced size of the NN has no degradation in forming the beams to the desired directions. The angular separation between the targets is an important parameter in cylindrical array beamformer.

Beam scanning Microstrip (BSMS) antenna is designed to work at center frequency of 10 GHz for using in the scanning applications of 9 GHz to 11 GHz band. The design parameters are defined and by using an Electromagnetic Simulation software program, the parameters are optimized. A Beam Scanning Microstrip Antenna is produced as a prototype and the measurement&rsquo / s results are compared with theoretical results. In conclusion, the values of deviation between theoretical and experimental results are discussed.

The scope of this thesis is to implement radar emitter emulator in a low cost, portablehardware for operational and educational purposes. The model enables pulse train generation in real environment belonging to radar emitters for military exercises. The motivation comes from another research area which is to design effective algorithms for deinterleaving mixed pulse sequences in a suitable hardware and this thesis, covers the work done for implementing a hardware that generates mixed pulse sequences. First of all, a basic radar emitter model is built up using laboratory instruments by considering basic radar emitter models. Technical specs of these instruments have to be known well to find out how many emitters can be emulated simultaneously and what the limits of these emulations are. After giving emulation results, trigging signal generator externally to obtain complex mixed pulse sequences is mentioned. In the following section related schematics are given about implementing radar emitters. Cost efficient way of emitter emulation is mentioned by using wideband RF synthesizer/VCO with integrated RF mixers and some microwave components in the following section. A board is designed including all required components to implement radar emitter emulation. Tests are implemented in laboratory environment. Finally test results and technical specifications of the design are given. Also cost calculations of the implemented designs are done in the final section and some examples related to the use of emulators in environmental scenarios are given. Future work is also explained again in this final section.

In this thesis, implementation details of a joint channel estimator and parallelized decoder structure on an FPGA-based platform is considered. Turbo decoders are used for the decoding process in this structure. However, turbo decoders introduce large decoding latencies since they operate in an iterative manner. To overcome that problem, parallelization is applied to the turbo codes and the resulting parallel decodable turbo code (PDTC) structure is employed for coding. The performance of a PDTC decoder and parameters affecting its performance is given on an additive white Gaussian noise (AWGN) channel. These results are compared with the results of a parallel study which employs a different architecture in implementing the PDTC decoder. In the fading channel case, a pilot symbol assisted estimation method is employed for the channel estimation process. In this method, the channel coefficients are estimated by a 2-way LMS (least mean-squares) algorithm. The difficulties in the implementation of this joint structure in a fixed-point arithmetic and the solutions to overcome these difficulties are described in details. The proposed joint structure is tested with varying design parameters over a Rayleigh fading channel. The overall decoding latencies and allowed data rates are calculated after obtaining a reasonable performance from the design.

In this thesis, the passive localization problem is studied. Robust and recursive solutions are presented by the use of Time Difference of Arrival (TDOA). The TDOA measurements are assumed to be gathered by moving sensors which makes the number of the sensors increase synthetically. First of all, a location estimator should be capable of processing the new measurements without omitting the past data. This task can be accomplished by updating the estimate recursively whenever new measurements are available. Convenient forms of the recursive filters, such as the Kalman filter, the Extended Kalman filter etc., can be applied. Recursive filter can be divided to two major groups: (a) The first type of recursive estimators process the TDOA measurements directly, and (b) the second type of the recursive estimators is the post processing estimators which process the TDOA indirectly, instead they fuse or smooth available location estimates. In this sense, recursive passive localization methods are presented for both types. In practice, issues like being spatially distant from each other and/or a radar with a rotating narrow beam may prevent the sensors to receive the same pulse. In such a case, the sensors can not construct common TDOA measurements which means that they can not accomplish the location estimation procedure. Additionally, there may be more than one sensor group making TDOA measurements. An estimator should be capable of fusing the measurements from different sensor groups. A sensor group consists of sensors which are able to receive the same pulse. In this work, solutions of these tasks are also given. Performances of the presented methods are compared by simulation studies. The method having the best performance, which is based on the Kalman Filter, is also capable of estimating the track of a moving emitter by directly processing the TDOA measurements.

In this thesis work, Cyclic Root MUSIC method is integrated with spatial smoothing and interpolation techniques to estimate the direction of arrivals of coherent,cyclostationary signals received via a Uniform Circular Array (UCA). Cyclic Root MUSIC and Conventional Root MUSIC algorithms are compared for various signal scenarios by computer simulations. A cyclostationary process is a random process with probabilistic parameters, such as the autocorrelation function, that vary periodically with time. Most of the man-made communication signals exhibit cyclostationarity due to the periodicity arising from their carrier frequencies, chip rates, baud rates, etc. Cyclic Root MUSIC algorithm exploits the cyclostationarity properties of signals to achieve signal selective direction of arrival estimation. Spatial smoothing is presented to overcome the coherent signals problem in a multipath propagation environment. Forward spatial smoothing and forward backward spatial smoothing techniques are investigated. Interpolation method is presented to cope with the restrictions of spatial smoothing on array structure. Although the array structure that is considered in this thesis (Uniform Circular Array), is not suitable for applying spatial smoothing directly, using interpolation method makes it possible. Performance of Cyclic Root MUSIC and Conventional Root MUSIC algorithms are compared under variation of various factors by computer simulations. Effects of signal type on the performance of the algorithms are observed by using different signal scenarios.

In this thesis, a low phase noise local oscillator operating at 2210 MHz is designed and implemented to be used in X-Band transmitter of a LEO satellite. Designed local oscillator is a PLL (Phase Locked Loop) based frequency synthesizer which is implemented using discrete commercial components including ultra low noise voltage controlled oscillator and high resolution, low noise fractional-N synthesizer. Operational settings of the synthesizer are done using three wire serial interface of a microcontroller. Although there are some imperfections in the implementation, phase noise of the prototype system is pretty good which is measured as -123.2 dBc/Hz at 100 kHz offset and less than -141.3 dBc/Hz at 1 MHz offset. Made up of discrete components, the VCO used in the designed local oscillator is not integrable to frequency synthesizer which is implemented in CMOS technology. Considering technological progress, integrabilitiy of system components becomes important for designing single chip complete systems like transmitters, receivers or transceivers. Therefore considering a potential single chip transceiver production, also a CMOS voltage controlled oscillator is designed using standard TSMC 0.18um technology operating in between 2.05 GHz and 2.35 GHz . Since low phase noise is the main concern, phase noise models and phase noise reduction techniques that are derived from the models are studied. These techniques are applied to the VCO core to see the effects. Design is finalized by applying some of those techniques which are found to be noticeably effective to the core design. Finalized core operates from 2.15 GHz to 2.25 GHz and phase noise is simulated as -107.265 dBc/Hz at 100 kHz offset and -131.167 dBc/Hz at 1 MHz offset. Also oscillator has figure of merit of -185.4 at 100 kHz offset. These values show that designed core is considerably good when compared to similar designs.