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Much of the low energy phenomenology which can be extracted from the field theory limit of the intrinsically ten dimensional E 8 ® E 8 heterotic superstring depends upon the topological and geometrical properties of the six dimensional compactified component of spacetime. After briefly reviewing the topological constraints on the latter manifold which ensure the survival of N=l four dimensional supersymmetry, we present and apply the mathematics necessary for the rigorous construction of vacuum solutions and the determination of the four dimensional massless field content. Two phenomenologically attractive classes of solutions, with unbroken E₈ ⨂ SU(5) and E₈ ⨂ SO(10) gauge groups, arise if the vacuum configuration contains a Ricci flat Kahler manifold with SU(3) holonomy (Calabi-Yau manifold), which admits certain SU(5) or SU(4) vector bundles. Further reduction of the gauge group and emergence of naturally light weak Higgs doublets may also occur by flux breaking if the Calabi Yau manifold is multiply connected. We analyse the feasibility of such scenarios for Calabi Yau manifolds with any possible fundamental group. Phenomenological considerations place severe constraints on the dimensions and transformation properties of certain cohomology groups and thereby lead to a highly restricted class of acceptable models. We then present the mathematical analysis of a three generation heterotic superstring inspired model, with E₈ ⨂ E₆ gauge symmetry. A detailed description of the manifold of compactification is given, along with a determination of its Hodge numbers and of the associated light supermultiplet structure. For a particular choice of vacuum moduli we derive this manifold's symmetry group, and determine its action on the massless fields in the theory. Preliminary investigation indicates that these transformation properties give rise to a remarkably realistic model. In the second volume we derive cosmological constraints on a supersymmetric extension of the standard model in which weak gauge symmery breaking is triggered at the tree level by a Higgs singlet superfield. The fermionic component of this gauge singlet (the "nino") is shown to be the lightest supersymmetric particle with a relic abundance near the critical closure density for a surprisingly wide range of the unconstrained parameters. The previously favoured photino dark matter scenario has been eliminated by the non observation of high energy solar neutrinos. After briefly reviewing this argument, we extend the analysis to eliminate Higgsino dark matter scenarios with and#60H₁°and#62 ≠ and#60H₂°and#62. We show that the nino produces an acceptably low level of solar neutrinos and that it may also account for the anomalously high level of cosmic ray antiproton flux.

This thesis verified that metric spaces can be constructed using ultrametrics d and D, where d(x,y) = 0 if x = y and d(x,y) = (1/2) k if x not equal to y, such that x-y = 2k(a/b) for a,b relatively prime to 2, and where D(A,B)= max(d(al,bl); d(a2,b2)) for A = (al,a2) and B = (bl,b2).Assuming that a line is represented by some linear equation, a one-dimensional point was defined as an element of Q and a two-dimensional point as an element of Q x Q. There was an investigation of one-dimensional points with respect to the behavior of segments, midpoints, and distances as measured by d. The function D demonstrated the behavior of midpoints, medians, and triangles, as well as the congruence relation. The study necessitated the introduction of pseudomidpoints and pseudomedians, and an unorthodox definition of angle measurement.

The growing complexity of System-on-Chip (SoC) designs motivates both academic and industrial researchers to find better solutions for the complexity of the chip-interconnect. For SoC designs that have hundreds of Processing Elements (PEs), a single shared bus can no longer be accepted as an efficient communication scheme. To address this problem, the Networks-on-Chip (NoC) concept is proposed as a new paradigm, which provides an integrated solution for achieving efficient interconnection scheme for complex SoC applications. NoC-based designs are composed of computational resources in the form of PE cores, and switching nodes (routers) that allow PEs to communicate with each other. For different applications, this research work: 1) proposes new analytical models for various NoC design parameters, 2) performs comparative analyses of the commonly used network architectures, and 3) presents novel methodologies for efficiently designing the NoC-topology. The proposed methodologies are developed to help NoC-designers better achieve minimum power consumption and delay, and maximum performability for their applications. Graph-theoretic concepts are adopted to study the topological architecture of NoCs and propose a new topology-based models for network power, performability, and delay. The proposed models take into consideration important design parameters, which significantly affect the power, performability, and delay of a NoC-based system; such as network topology architecture, traffic distribution, noise power, voltage swing, probability of edge failure, router design and number of ports, clock frequency, and target technology. In this dissertation, we show how the proposed models could be used to optimally design the network topology so that it achieves the target design requirement for a given application. After studying each design metric individually, a joint consideration of NoC power, performability, and delay is carried out simultaneously. We use Particle Swarm Optimization (PSO) to find the optimum network topology, that achieves minimum delay, maximum performability, and minimum power consumption, for a given NoC application. Real case studies are presented to validate the proposed theoretical concepts. This validation is carried out through experimental work, targeting various real NoC applications. Experimental results show that using the proposed design methodologies, designers can improve the overall system efficiency in terms of power, delay, and performability, by choosing the design parameters (i.e., network topology architecture, PEs’ mapping, etc.) efficiently at early design phases. This improvement is measured in some cases by an order of magnitude, compared to the worst case scenario of choosing wrong design parameters for the target application. / Graduate

Thesis (Ph.D.)--Auburn University, 2005. / Abstract. Vita. Includes bibliographic references (ℓ. 69-70)

Thesis (Ph. D.)--University of Toronto, 2006. / Source: Dissertation Abstracts International, Volume: 67-06, Section: B, page: 3254. Includes bibliographical references.

Thesis (Ph. D. in Mathematics)--Vanderbilt University, May 2008. / Title from title screen. Includes bibliographical references.

Thesis (M.S.)--Ohio University, March, 1986. / Title from PDF t.p.