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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Vme Slave Implementation On Fpga

Zorer, Tolga 01 November 2008 (has links) (PDF)
In today&rsquo / s complex technological systems, there is a need of multi tasking several units running in accordance. Each unit is composed of several intelligent microcontroller cards. Each intelligent card performs a different task that the unit is responsible of. For this reason, there is a need of common communication bus between these cards in order to accomplish the task duties. VME (Versa Module Euro-Card) bus is a well known, the most reliable and the commonly used communication bus, even if it was standardized three decades ago. In this thesis work, the world wide accepted VME parallel bus protocol is implemented on FPGA (Field programmable Gate Array). The implementation covers the VME standard slave protocols. The VME Slave Module has been developed by VHDL (Very high level Hardware Description Language). The simulations have been carried over a computer based environment. After the verification of the VHDL code, an Intellectual Property (IP) core is synthesized and loaded into the FPGA. The FPGA based printed circuit board has been designed and the IP core&rsquo / s function has been tested by bus protocol checkers for all of its functionality. The designed hardware has several standard serial communication ports, such as / USB, UART and I2C. Through the developed card and the add-on units, it is also possible to communicate with these serial ports over the VME bus.

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