The unprecedented demand for performance in the latest technologies will ultimately require changes in the way we design cache. Emerging high density embedded memories such as Spin-Transfer Torque Random Access Memory (STTRAM) have emerged as a possible candidate for universal memory due to its high speed, low power, non-volatility, and low cost. Although attractive, STTRAM is susceptible to contactless tampering through malicious exposure to magnetic field with the intention to steal or modify the bitcell content. In this thesis, we explore various attack techniques on STTRAM and then propose a novel array-based sensor to detect the polarity and magnitude of such attacks and then propose two design techniques to mitigate the attack. With our research, we have been able to successfully implement and accurately detect an attack while providing sufficient compensation window (few ns to ~100 us) to enable proactive protection measures. Finally, we show that variable-strength ECC can adapt correction capability to tolerate failures with various strength of an attack.