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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Fault diagnosis of VLSI designs: cell internal faults and volume diagnosis throughput

Fan, Xiaoxin 01 December 2012 (has links)
The modern VLSI circuit designs manufactured with advanced technology nodes of 65nm or below exhibit an increasing sensitivity to the variations of manufacturing process. New design-specific and feature-sensitive failure mechanisms are on the rise. Systematic yield issues can be severe due to the complex variability involved in process and layout features. Without improved yield analysis methods, time-to-market is delayed, mature yield is suboptimal, and product quality may suffer, thereby undermining the profitability of the semiconductor company. Diagnosis-driven yield improvement is a methodology that leverages production test results, diagnosis results, and statistical analysis to identify the root cause of yield loss and fix the yield limiters to improve the yield. To fully leverage fault diagnosis, the diagnosis-driven yield analysis requires that the diagnosis tool should provide high-quality diagnosis results in terms of accuracy and resolution. In other words, the diagnosis tool should report the real defect location without too much ambiguity. The second requirement for fast diagnosis-driven yield improvement is that the diagnosis tool should have the capability of processing a volume of failing dies within a reasonable time so that the statistical analysis can have enough information to identify the systematic yield issues. In this dissertation, we first propose a method to accurately diagnose the defects inside the library cells when multi-cycle test patterns are used. The methods to diagnose the interconnect defect have been well studied for many years and are successfully practiced in industry. However, for process technology at 90nm or 65nm or below, there is a significant number of manufacturing defects and systematic yield limiters lie inside library cells. The existing cell internal diagnosis methods work well when only combinational test patterns are used, while the accuracy drops dramatically with multi-cycle test patterns. A method to accurately identify the defective cell as well as the failing conditions is presented. The accuracy can be improved up to 94% compared with about 75% accuracy for previous proposed cell internal diagnosis methods. The next part of this dissertation addresses the throughput problem for diagnosing a volume of failing chips with high transistor counts. We first propose a static design partitioning method to reduce the memory footprint of volume diagnosis. A design is statically partitioned into several smaller sub-circuits, and then the diagnosis is performed only on the smaller sub-circuits. By doing this, the memory usage for processing the smaller sub-circuit can be reduced and the throughput can be improved. We next present a dynamic design partitioning method to improve the throughput and minimize the impact on diagnosis accuracy and resolution. The proposed dynamic design partitioning method is failure dependent, in other words, each failure file has its own design partition. Extensive experiments have been designed to demonstrate the efficiency of the proposed dynamic partitioning method.
2

On improving estimation of root cause distribution of volume diagnosis

Tian, Yue 01 December 2018 (has links)
Identifying common root causes of systematic defects in a short time is crucial for yield improvement. Diagnosis driven yield analysis (DDYA) such as Root cause deconvolution (RCD) is a method to estimate root cause distribution by applying statistical analysis on volume diagnosis. By fixing identified common root causes, yield can be improved. With advanced technologies, smaller feature size and more complex fabrication processes for manufacturing VLSI semiconductor devices lead to more complicated failure mechanisms. Lack of domain knowledge of such failure mechanisms makes identifying the emerging root causes more and more difficult. These root causes include but are not limited to layout pattern (certain prone to fail layout shapes) and cell internal root causes. RCD has proved to have certain degree of success in previous work, however, these root cause are not included and pose a challenge for RCD. Furthermore, complex volume diagnosis brings difficulty in investigation on RCD. To overcome the above challenges to RCD, improvement based on better understanding of the method is desired. The first part of this dissertation proposes a card game model to create controllable diagnosis data which can be used to evaluate the effectiveness of DDYA techniques. Generally, each DDYA technique could have its own potential issues, which need to be evaluated for future improvement. However, due to limitation of real diagnosis data, it is difficult to, 1. Obtain diagnosis data with sufficient diversity and 2. Isolate certain issues and evaluate them separately. With card game model given correct statistical model parameters, impact of different diagnosis scenarios on RCD are evaluated. Overfitting problem from limited sample size is alleviated by the proposed cross validation method. In the second part of this dissertation, an enhanced RCD flow based on pre-extract layout patterns is proposed to identify layout pattern root causes. Prone to fail layout patterns are crucial factors for yield loss, but they normally have enormous number of types which impact the effectiveness of RCD. Controlled experiment shows effectiveness of enhanced RCD on both layout pattern root causes and interconnect root causes after extending to layout pattern root causes. Test case from silicon data also validates the proposed flow. The last part of this dissertation addresses RCD extension to cell internal root causes. Due to limitation of domain knowledge in both diagnosis process and defect behavior, parameters of RCD model are not perfectly accurate. As RCD moves to identify cell internal root causes, such limitation become an unescapable challenge for RCD. Due to inherent characteristics of cell internal root cause, RCD including cell internal root cause faces more difficulty due to less accurate model parameters. Rather than enhancing domain knowledge, supervised learning for more accurate parameters based on training data are proposed to improve accuracy of RCD. Both controlled experiments and real silicon data shows that with parameters learned from supervised learning, accuracy of RCD with cell internal root cause are greatly improved.

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