n-channel and p-channel amorphous-silicon thin-film transistors (a-Si:H TFTs) with copper electrodes prepared by a novel plasma etching process have been fabricated and studied. Their characteristics are similar to those of TFTs with molybdenum electrodes. The reliability was examined by extended high-temperature annealing and gate-bias stress. High-performance CMOS-type a-Si:H TFTs can be fabricated with this plasma etching method. Electrical characteristics of a-Si:H TFTs after Co-60 irradiation and at different experimental stages have been measured. The gamma-ray irradiation damaged bulk films and interfaces and caused the shift of the transfer characteristics to the positive voltage direction. The field effect mobility, on/off current ratio, and interface state density of the TFTs were deteriorated by the irradiation process. Thermal annealing almost restored the original state's characteristics. Floating gate n-channel a-Si:H TFT nonvolatile memory device with a thin a- Si:H layer embedded in the SiNx gate dielectric layer has been prepared and studied. The hysteresis of the TFT's transfer characteristics has been used to demonstrate its memory function. A steady threshold voltage change between the "0" and "1" states and a large charge retention time of > 3600 s with the "write" and "erase" gap of 0.5 V have been detected. Charge storage is related to properties of the embedded a-Si:H layer and its interfaces in the gate dielectric structure. Discharge efficiencies with various methods, i.e., thermal annealing, negative gate bias, and light exposure, separately, were investigated. The charge storage and discharge efficiency decrease with the increase of the drain voltage under a dynamic operation condition. Optimum operating temperatures are low temperature for storage and higher temperature for discharge. a-Si:H metal insulator semiconductor (MIS) capacitor with a thin a-Si:H film embedded in the silicon nitride gate dielectric stack has been characterized for memory functions. The hysteresis of the capacitor's current-voltage and capacitance-voltage curves showed strong charge trapping and detrapping phenomena. The 9 nm embedded a-Si:H layer had a charge storage capacity six times that of the capacitor without the embedded layer. The nonvolatile memory device has potential for low temperature circuit applications.

Rapid progress over the last decade on thin film transistor (TFT) active matrix organic light emitting (AMOLED) displays led to the emergence of high-performance, low-power, low-cost flat panel displays. Despite the shortcomings of the active matrix that are associated with the instability and low mobility of TFTs, the amorphous silicon TFT technology still remains the primary solution for the AMOLED backplane. To take advantage of this technology, it is crucial to develop driving schemes and circuit techniques to compensate for the limitations of the TFTs. The driving schemes proposed in this thesis address these challenges, in which, the sensitivity of the OLED current to the transistor variations is reduced significantly. This is achieved by comparing the data signal with a feedback signal associated with the pixel current by means of an external driving circuit through a column feedback line. Depending on the nature of the feedback signal, (i.e. current or voltage) several pixel circuits and external drivers are proposed. New AMOLED pixel circuits with voltage and current feedback are designed, simulated, fabricated, and tested. The performance of these circuits is analyzed in terms of their stability, settling time, power efficiency, noise, and temperature-dependence. For the pixel circuits with current feedback, an operational transresistance amplifier is designed and implemented in a high-voltage CMOS process. Measurement results for both voltage and current feedback driving schemes indicate less than a 2%/V sensitivity to shifts in the threshold voltage of the TFTs. By using current feedback and an accelerating pulse, programming times less than 50 s are achieved.

Rapid progress over the last decade on thin film transistor (TFT) active matrix organic light emitting (AMOLED) displays led to the emergence of high-performance, low-power, low-cost flat panel displays. Despite the shortcomings of the active matrix that are associated with the instability and low mobility of TFTs, the amorphous silicon TFT technology still remains the primary solution for the AMOLED backplane. To take advantage of this technology, it is crucial to develop driving schemes and circuit techniques to compensate for the limitations of the TFTs. The driving schemes proposed in this thesis address these challenges, in which, the sensitivity of the OLED current to the transistor variations is reduced significantly. This is achieved by comparing the data signal with a feedback signal associated with the pixel current by means of an external driving circuit through a column feedback line. Depending on the nature of the feedback signal, (i.e. current or voltage) several pixel circuits and external drivers are proposed. New AMOLED pixel circuits with voltage and current feedback are designed, simulated, fabricated, and tested. The performance of these circuits is analyzed in terms of their stability, settling time, power efficiency, noise, and temperature-dependence. For the pixel circuits with current feedback, an operational transresistance amplifier is designed and implemented in a high-voltage CMOS process. Measurement results for both voltage and current feedback driving schemes indicate less than a 2%/V sensitivity to shifts in the threshold voltage of the TFTs. By using current feedback and an accelerating pulse, programming times less than 50 s are achieved.

abstract: The thesis focuses on cost-efficient integration of the electro-chemical residue sensor (ECRS), a novel sensor developed for the in situ and real-time measurement of the residual impurities left on the wafer surface and in the fine structures of patterned wafers during typical rinse processes, and wireless transponder circuitry that is based on RFID technology. The proposed technology uses only the NMOS FD-SOI transistors with amorphous silicon as active material with silicon nitride as a gate dielectric. The proposed transistor was simulated under the SILVACO ATLAS Simulation Framework. A parametric study was performed to study the impact of different gate lengths (6 μm to 56 μm), electron motilities (0.1 cm2/Vs to 1 cm2/Vs), gate dielectric (SiO2 and SiNx) and active materials (a-Si and poly-Si) specifications. Level-1 models, that are accurate enough to acquire insight into the circuit behavior and perform preliminary design, were successfully constructed by analyzing drain current and gate to node capacitance characteristics against drain to source and gate to source voltages. Using the model corresponding to SiNx as gate dielectric, a-Si:H as active material with electron mobility equal to 0.4 cm2/V-sec, an operational amplifier was designed and was tested in unity gain configuration at modest load-frequency specifications. / Dissertation/Thesis / M.S. Electrical Engineering 2010