Application-dependent FPGA testing is performed to ensure that a particular user-defined application is implemented on fault-free areas of an FPGA. Applying this type of test technique leads to yield increases and cost reductions in the use of FPGAs. In this thesis, we propose a novel application-dependent FPGA testing strategy, in which a recursive circuit partitioning algorithm is employed to obtain a testing configuration solution for a user-specific application. This algorithm is implemented and the experimental results are analyzed to demonstrate the effectiveness of the proposed testing strategy. Our experimental results show that the circuit partitioning method can be used to provide a reasonable solution for an arbitrary application with significantly improved fault coverage and an approximately minimized number of cut points