As is the case for DC-DC converters, multi-phase converters require both high-quality power control and high power-density. Although a higher switching frequency not only improves the quality of the converter output but also decreases the size of the converter, it increases switching losses and electromagnetic interference (EMI) noise. Since the soft-switching topologies reduce the switching losses of the converter main switches, the topologies make converters partially independent from the switching frequency. However, the conventional soft-switching topologies have already proposed most of the possible ways to improve converter performance. In addition, the trends of the newly generated power devices reduce the advantages of soft-switching topologies. This critical situation surrounding soft-switching topologies gives research motivations: What features of soft-switching topologies facilitate their practical applications? Given this motivation, the dissertation discusses two aspects = simplifying auxiliary circuits and accounting for the effects of soft-switching operations on the converter control. Engineers working with medium- and high-power multi-phase converters require simplified soft-switching topologies that have the same level of performance as the conventional soft-switching topologies. This demand is the impetus behind one of the research objectives = simplifying the auxiliary circuits of Zero-Voltage-Transition (ZVT) inverters. Simplifying the auxiliary circuits results in both a smaller number of and lower cost for auxiliary components, without any negative impact on performance. This dissertation proposes two major concepts for the simplification - the Single-Switch Single-Leg (S3L) ZVT cell and the Phase-Lock (PL) concept. Throughout an effort to eliminate circulating currents of inductor-coupled (IC) ZVT converters, the S3L ZVT cell is developed. The proposed cell allows a single auxiliary switch to achieve zero-voltage conditions for both the top and bottom main switches, and it achieves the same level of performance as the conventional ZVT cell, as well. This proposal makes IC ZVT topologies more attractive to multi-phase converter applications. Because all of the top main switches generally have identical sequences for zero-voltage turn-on commutations, one auxiliary switch might handle the commutations of all of the top main switches. This possibility introduces the PL concept, which allows the two auxiliary switches to provide a zero-voltage condition for any main switch commutation. In order to compensate for restrictions of this concept, a modified space-vector modulation (SVM) scheme also is introduced. A soft-switching topology changes the duty ratios of the converter, which affects the controllability of the converter. Therefore, this dissertation selects resolution of this issue as one of the research objectives. This dissertation derives the generalized timing equations of ZVT operations, and the generalized equations formulize the effect of ZVT operation on both duty ratios and DC current. Moreover, the effect of SVM schemes is also investigated. An average model of the ZVT converter is developed using both the timing analysis and the investigation of SVM schemes, and small-signal analysis using the average model predicts the steady-state characteristics of the converter. / Ph. D.

This thesis develops the dynamic phasor model of a line-commutated converter (LCC) high-voltage direct current (HVDC) transmission system. The mathematical definition and properties of dynamic phasors are utilized to model both the dc-side and the ac-side of a LCC-HVDC transmission system as well as 6-pulse Graetz bridge, which is the building block of such a system. The developed model includes low-frequency dynamics of the systems, i.e., fundamental frequency component (50 Hz) at the ac-side and dc component at the dc-side, and removes high-frequency transients. The developed model, however, is capable of accommodating higher harmonics if necessary. The model is also able to simulate the system during abnormal modes of operations such as unbalanced operation and commutation failure. In order to develop the dynamic phasor model of a line-commutated converter, the concept of switching functions is utilized. The developed model is capable of capturing large-signal transients of the system as well as steady state operating conditions. The model can be used in order to decrease the computational intensity of LCC-HVDC simulations. The developed model in this thesis enables the user to consider each harmonic component individually; this selective view of the components of the system response is not possible to achieve in conventional electromagnetic transient simulations. / October 2016

A systematic and versatile method to derive accurate and efficient Circuit Oriented Large Signal Average Models (COLSAMs) that approximate the slow dynamics manifold of the moving average values of the relevant state variables for Pulse-Width Modulated (PWM) dc to dc and three-phase to dc power converters is developed. These COLSAMs can cover continuous conduction mode (CCM) as well as discontinuous conduction mode (DCM) of operation and they are over one order of magnitude cheaper, computation wise, than the switching models. This method leads primarily to simple and effective input-output oriented models that represent transfer as well as loading characteristics of the converter. Sine these models consist of time invariant continuous functions they can be linearized at an operating point in order to obtain small-signal transfer functions that approximate the dynamics of the original PWM system around an orbit. The models are primarily intended for software circuit simulators (i.e. Spice derived types, Saber, Simplorer, etc), to take advantage of intrinsic features such as transient response, linearization, transfer function, harmonic distortion calculations, without having to change simulation environment. Nevertheless, any mathematics simulator for ordinary differential equations can be used with the set of equations obtained through application of Kirchoff's laws to the COLSAMs. Furthermore, the COLSAMs provide physical insight to help with power stage and control design, and they allow easy interconnection among themselves, as well as with switching models, for complete analysis at different scales (time, signal level, complexity; interconnectivity). A new average model for the Zero-Voltage Switched Full-Bridge (ZVS-FB) PWM Converter is developed with the above method and its high accuracy is verified with simulations from a switching behavioral model for several circuit component values for both CCM and DCM. Intrinsic positive damping effects and special delay characteristics created by an energy holding element in a saturable reactor-based Zero-Voltage Zero-Current Switched Full-Bridge (ZVZCS-FB) PWM converter are explained for the first time by a new average model. Its large signal predictions match very well those from switch model simulations whereas its small-signal predictions are verified with experimental results from 3.5 kW prototype modules. The latter are used in a multi-module converter to supply the DC power bus in and aircraft. The design of control loops for the converter is based on the new model and its linearization. The ZVZCS-FB PWM converter's average model above is extended to deal with interconnection issues and constraints in a Quasi-Single Stage (QSS) Zero-Voltage Zero-Current Switched (ZVZCS) Three-Phase Buck Rectifier. The new model reveals strong nonlinear transfer characteristics for standard Space Vector Modulation (SVM), which lead to high input current distortion and output voltage ripple inadmissible in telecommunications applications. Physical insight provided by this average model led to the development of a combined modified SVM and feed-forward duty-cycle compensation scheme to reliably minimize the output voltage ripple. Experimental results from a 6 kW prototype validate large signal model for standard and modified SVM, with and without duty-cycle compensation scheme. / Ph. D.

This thesis provides insight into state-of-the-art Modular Multilevel Converters (MMC) for medium and high voltage applications. Modular Multilevel Converters have increased in interest in many industrial applications, as they offer the following advantages: modularity, scalability, reliability, distributed location of capacitors, etc. In this study, the modeling, control and design considerations of modular based multilevel converters, with an emphasis on the reliability of the converter, is carried out. Both modular multilevel converters with half-bridge and full-bridge sub-modules are evaluated in order to provide a complete analysis of the converter. From among the family of modular based hybrid multilevel converters, the newly released Alternate Arm Converter (AAC) is considered for further assessment in this study. Thus, the modular multilevel converter with half-bridge and full-bridge power cells and the Alternate Arm Converter as a commercialized hybrid structure of this family are the main areas of study in this thesis. Finally, the DC fault analysis as one of the main issues related to conventional VSC converters is assessed for Modular Multilevel Converters (MMC) and the DC fault ride-through capability and DC fault current blocking ability is illustrated in both the Modular Multilevel Converter with Full-Bridge (FB) power cells and in the Alternate Arm Converter (AAC). Accordingly, the DC fault control scheme employed in the converter and the operation of the converter under the fault control scheme are explained. The main contributions of this study are as follows: The new D-Q model for the MMC is proposed for use in the design of the inner and outer loop control. The extended control scheme from the modular multilevel converter is employed to control the Alternate Arm Converters. A practical reliability-oriented sub-module capacitor bank design is described based on different reliability modeling tools. A Zero Current Switching (ZCS) scheme of the Alternate Arm Converter is presented in order to reduce the switching losses of the Director Switches (DS) and, accordingly, to implement the ZCS, a design procedure for the Arm inductor in the AAC is proposed. The capacitor voltage waveform is extracted analytically in different load power factors and the waveforms are verified by simulation results. A reliability-oriented switching frequency analysis for the modular multilevel converters is carried out to evaluate the effect of the switching frequency on the MMC's operation. For the latter, a DC fault analysis for the MMC with Full-Bridge (FB) power cells and the AAC is performed and a DC fault control scheme is employed to provide the capacitor voltage control and DC fault current limit, and is illustrated herein. / Master of Science