A dissertation submitted to the Faculty of Engineering, University of the Witwatersrand, in fulfilment of the requirements for the degree of Master of Sclenice in Engineering February 20th, 1998 / All available model used to determine the 50% breakdown voltage for rod-type ami conductor-type gaps subject to switching is impulse wave forms has been applied to a tower-conductor window gap configurution. The results for rod-plane, conductor-piane and tower-conductor window gaps have all been compared and correspond well with practical data. III order to app(v the model, a charge simulation technique has been adopted ill conjunction with the 'Coulomb 3D' charge simulation package. Additional tests have been performed where parameters of'the charge simulation method am! the electrode geometl:p hare been adjusted and consequent conclusions made. Recommendations for further application of tile model have been suggested. / MT2017

Abstract The tendency to manufacture of semiconductor is to minimize the size of device. With the size was minimized, the number of transistor on the chip was maximized at the same time .However, when the drift region of Power-MOSFET is shorter will result in the Breakdown Voltage is lower, so this do not conform our purpose for application, and therefore we should look for some alternative method to enhance efficiency. One of these method of efficiency promotion is adopting channel strain. We adopt bending silicon substrate to obtain strain. By using this method, we successfully enhance drain current and mobility 12.1% and 4.1% individually. Furthermore, regarding the reliability study, we realize the hot-carrier effect influence under strain silicon. The longer the size(Lg & DL) of Power- MOSFET , the reliability is better. When device were bent under Bending R=40mm and Lg=0.8(m conditions, we can obtain the better reliability of device than flat chip.

Thesis (M.S.)--Mississippi State University. Department of Electrical and Computer Engineering. / Title from title screen. Includes bibliographical references.

Thesis--Auburn University, 2010. / Abstract. Includes bibliographic references (p.55-56).

This thesis presents the design and implementation of PMOS-based integrated charge pumps with extended voltage range and their regulation circuits in a standard process. The performance of charge pumps are evaluated by their output resistances and power conversion efficiencies. Formulas which describe the charge pump characteristics are developed and presented. Existing charge pumps are analyzed and studied to understand their limitations in generating high voltages and achieving high performance. The proposed charge pump structures are designed to use PMOS switches to alleviate the high voltage stresses across transistors by biasing their bulk independently. The voltages across transistors and capacitors are kept within the suggested voltage rating (VDD)regardless of how high the output voltage is, thus the maximum voltage range is extended and no longer limited by the breakdown voltages of the devices. The charge pump circuits only need low-voltage devices and standard processes, and can be easily integrated in a digital or mixed-signal design. The proposed charge pump regulation circuits include a voltage divider, a voltage controlled ring oscillator and a feedback operational amplifier. The regulation circuits are able to adjust the clock frequency to regulate the charge pump to a steady output voltage (set by the reference voltage) under a large range of current loads. A test chip including the proposed charge pumps and regulation circuits was fabricated in a 0.18 um digital CMOS process provided by Taiwan Semiconductor Manufacturing Company (TSMC). The proposed charge pumps were tested and demonstrated the reliable generation of output voltages up to 11.47 V using only low-voltage devices. The simulation and measurement results have been presented and compared, demonstrating the functionality and performance of the proposed circuits. / Kapik Integration, Mitacs

No description available.

The thesis constitutes a systematic theoretical and experimental investigation into impulse breakdown voltage-time curves of coaxial-cylinder gaps in SF(,6) and a 50% SF(,6) - 50% N(,2) mixture. The breakdown time delay probability is treated as a bivariate distribution in statistical and formative time lags. A method is developed to deduce the marginal breakdown voltage probability curve from statistics of time delay. The experimental work was performed on 2.54/7.0-cm diameter, 60-cm long coaxial-cylinder electrodes using SF(,6) or SF(,6)-N(,2) mixtures at pressures of 0.1 - 0.3 MPa subjected to 0.5/50-(mu)s and 1.2/50-(mu)s impulses of both polarities. The effect of a spherical conducting particle attached to the central electrode of the coaxial-cylinder gap on the voltage-time characteristics is also investigated.

Thesis (M.S.)--West Virginia University, 2008. / Title from document title page. Document formatted into pages; contains xiv, 93 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 85-88). WVU users: Also available in print for a fee.

Thesis (M.S.)--University of Missouri-Columbia, 2006. / The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file (viewed on April 22, 2009) Includes bibliographical references.

No description available.