Among nitide sremiconductor, InN has the highest electron drift velocity and the smallest effective mass. InN has also been proven to be a narrow band gap semiconductor with a band gap energy of about 0.6-0.7 eV at room temperature. During the past few years, InN has attracted extensive attention due to is potential applications in semiconductor devices such as light-emitting diodes, lasers, and high efficiency solar cells. With the improvement of growth techniques in recently years, high quality InN films grown by plasma-assisted molecular-beam epitaxy (PAMBE) are now readily available. But there is no explicit knowledge for the physical properties of InN. In our experiment, we grow a serious of Si-doped InN with carrier concentration from 1.15 ¡Ñ 1018 cm-3 to 1.90¡Ñ1019 cm-3 by PAMBE . In this thesis we will introduce the instrument and describe the characteristics of Si-doped InN by photoluminescence, high-resolution x-ray diffraction, Raman spectroscopy, Scanning Electron Microscopy and cathodoluminescence

Thesis (Ph.D.)--University of Delaware, 2009. / Principal faculty advisors: N. Carolyn Schanen and Mary C. Farach-Carson, Dept. of Biological Sciences. Includes bibliographical references.

Thesis (Ph. D.)--University of Hong Kong, 2009. / Includes bibliographical references (p. 290-314). Also available in print.

Thesis (Ph. D.)--University of Hong Kong, 2009. / Includes bibliographical references (p. 290-314). Also available online.

Three-dimensional integrated circuits (3D-IC) have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs while also helping to reduce wire delay and increase memory throughput. While this technology offers many potential advantages, it also produces large thermal mismatch stress in 3D-IC structures employing Through-Silicon-Via (TSV). The stress distribution in silicon and interconnect is affected by the via diameter and layout geometry. TSV-induced stress effects on electron/hole mobility and device performance will be studied for the widely used 6-transistor (6T) SRAM cell. Simulation results in this study show that static noise margin (SNM), Read Margin (RM) and write margin (WM) tend to increase with decreasing electron mobility or increasing hole mobility. Considering TSV-induced stress, we propose that for practical layouts of TSV-based 3D-IC, p-type substrates should be placed further away from TSVs or closer to the smaller TSVs if multiple TSVs exist. / text

APPL BAR-PH heterodimer and APPL2 BAR-PH homodimer The APPL (Adaptor protein containing PH domain, PTB domain and Leucine zipper) family are adaptor proteins with only two isoforms, APPL1 and APPL2. They bind to early endosomes with a small GTPase, Rab5, and mediate the interactions between various receptors and downstream signaling components, thus functioning in many signaling pathways evoked by adiponectin, insulin, FSH, EGF, and so on. However, evidences have shown APPL1 and APPL2 should perform some opposite functions, which cannot be simply explained by the functional differences attributed to their PTB domains. We hypothesize that the heterodimerization of APPL1 and APPL2’s BAR domains may account for their opposing functions. The crystal structure of APPL BAR-PH heterodimer was solved to resolution 2.8 Å. Its overall structure exhibits crescent shape with a larger curvature radius of 76 Å, compared to 55 Å of the APPL1 BAR-PH homodimer. And the crystal structure APPL2 BAR-PH homodimer was solve to resolution 3.3 Å. The overall structure of APPL2 BAR-PH homodimer is very similar to that of APPL BAR-PH heterodimer, but shows greater difference in curvature to the APPL1 BAR-PH homodimer structure. The concave side of APPL BAR-PH heterodimer and APPL2 BAR-PH homodimer all possess less positive charge than the APPL1 BAR-PH homodimer. Structural analysis reveals that leucine patches at the dimer interface may account for the formation of dimeric curve with certain curvature. Consequently, APPL2 BAR is able to enforce the curvature reduction to APPL1 BAR upon heterodimerization. In conclusion, the alterations of curvature and electrostasis are responsible for the modulation of endosome binding specificity and can elucidate the opposite roles of APPL1 and APPL2. LanCL2 LanCL2 is a member of Lanthionine synthetase component C-like family. In human, LanCL2 binds to lanthionine derivatives and glutathione, participating in keeping intracellular reducing state. By binding to absiscic acid (ABA), LanCL2 is indispensible for the ABA-stimulated adipogenesis, insulin release, glucose homeostasis, and inflammatory response. It is also implicated in anticancer drug resistance. All these functions underscore the importance of LanCL2 in the diseases like diabetes, inflammation, and cancer. The crystal structure of LanCL2 was solved to resolution 1.8 Å. The overall structure displays canonical double-layer α-barrel. The major differences from LanCL1 lay in the loops on the barrel top, which are implicated in various substrate bindings. A zinc-coordinating pocket was found among the loops, with conserved amino acid residues of distinct conformation. The electrostatic surface shows remarkable differences compared to that of LanCL1, suggesting that it may contribute to distinct substrate binding profile. Future implications APPL proteins and LanCL proteins are all involved in the regulation of metabolism, such as glucose uptake, fatty acid oxidation, and insulin secretion, and play roles in diseases like obesity and type 2 diabete. Structural and functional studies of these proteins can provide insights into the molecular mechanisms and clues for related therapeutic approaches. / published_or_final_version / Physiology / Doctoral / Doctor of Philosophy

This study explores the mathematical programming aspects of the air cargo fleet assignment problem for one international air cargo carrier - Korean Air - under given origin-destination (O-D) pairs, departure and arrival times, and frequencies. A pure cargo service is taken as the basis for this study, since such a service is not constrained by passenger route determinants and the schedule of a combination air carrier. The objectives of the study include: to identify the pure air cargo network representation of the combination air carriers; to develop and solve a conventional branch-and-bound mathematical programming model for optimising the assignment of aircraft to flight routes given a set of constraints, including aircraft fleet size, schedule balance, and `required through' constraints; to develop and solve the fleet assignment problem using a novel neural network optimisation modelling approach; to investigate methods of implementing the neural network model, and to analyse the performance of the model when compared with conventional solution methods; and finally to analyse the utility of the neural network model and identify how it may be used in the design and development of air cargo networks for combination air carriers like Korean Air. There are four main parts to the thesis: the first part outlines the schedule design process of an airline and some details of the fleet assignment problem are reviewed. The air cargo flight network is represented and the fleet assignment problem is formulated as a mixed integer programming problem of cost minimisation with various constraints. The complexity of the problem is discussed; the second part outlines the various techniques available to solve optimisation problems and neural network models are presented and discussed as a promising alternative solution method. Neural network applications in the transport field are reviewed and the neural network process for optimisation and for solving the general assignment problem are studied and presented; the third part incorporates the practical application of both the conventional fleet assignment problem solving method and the proposed neural network method to a combination airline's case - Korean Air. The detailed process of constructing a time line network and formulating a mathematical programming model are described and equivalent neural network models are formulated. The results from the two solution approaches are compared and evaluated; and the final part summarises the main findings, presents the significant conclusions, the contribution of the research is discussed and some recommendations for further research are presented. Overall, the conventional branch-and-bound optimisation model yielded plausible results which were demonstrably superior to those produced using the novel neural network optimisation models.

The objective of the research presented in this thesis was to investigate the effects of wearout processes on the performance and reliability of CMOS bistable circuits. The main wearout process affecting reliability of submicron MOS devices was identified as hot-carrier stress (and the resulting degradation in circuit performance). The effect of hot-carrier degradation on the resolving time leading to metastability of the bistable circuits also have been investigated. Hot-carrier degradation was identified as a major reliability concern for CMOS bistable circuits designed using submicron technologies. The major hot-carrier effects are the impact ionisation of hot- carriers in the channel of a MOS device and the resulting substrate current and gate current generation. The substrate current has been used as the monitor for the hot-carrier stress and have developed a substrate current model based on existing models that have been extended to incorporate additional effects for submicron devices. The optimisation of the substrate current model led to the development of degradation and life-time models. These are presented in the thesis. A number of bistable circuits designed using 0.7 micron CMOS technology design rules were selected for the substrate current model analysis. The circuits were simulated using a set of optimised SPICE model parameters and the stress factors on each device was evaluated using the substrate current model implemented as a post processor to the SPICE simulation. Model parameters for each device in the bistable were degraded according to the stress experienced and simulated again to determine the degradation in characteristic timing parameters for a predetermined stress period. A comparative study of the effect of degradation on characteristic timing parameters for a number of latch circuits was carried out. The life-times of the bistables were determined using the life-time model. The bistable circuits were found to enter a metastable state under critical timing conditions. The effect of hot-carrier stress induced degradation on the metastable state operation of the bistables were analysed. Based on the analysis of the hot-carrier degradation effects on the latch circuits, techniques are suggested to reduce hot-carrier stress and to improve circuit life-time. Modifications for improving hot- carrier reliability were incorporated into all the bistable circuits which were re-simulated to determine the improvement in life-time and reliability of the circuits under hot-carrier stress. The improved circuits were degraded based on the new stress factors and the degradation effects on the critical timing parameters evaluated and these were compared with those before the modifications. The improvements in the life-time and the reliability of the selected bistable circuits were quantified. It has been demonstrated that the hot-carrier reliability for all the selected bistable circuits can be improved by design techniques to reduce the stress on identified critically stressed devices.

University, Diss., 2006--Frankfurt (Main). / Zsfassung in engl. und dt. Sprache.

Thesis (Ph. D.)--University of Hong Kong, 2008.