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An integrated analog multiplier circuitTraa, Einar 04 March 1968 (has links)
The exponential characteristic of the base-emitter
Junction in bipolar transistors was used to make an
accurate and fairly temperature independent multiplier.
Using hybrid-pi transistor models and ECAP, a
bandwidth of 350 MHz was predicted. Linearity is
limited by emitter degeneration in the input differential
stage rather than by the small errors in the actual
multiplying stage.
The multiplier was fabricated as a monolithic
integrated circuit in the Tektronix integrated circuits
laboratory. The prototype showed a bandwidth of 200 MHz,
and a linearity of 2% over 50% of the dynamic range,
when used as a variable gain amplifier. / Graduation date: 1968
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New methodology for low power and less test time in VLSI testingLee, Il-Soo, January 1900 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.
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Scalable solutions to specification and verification of large designs /Saxena, Nina, January 1999 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 114-124). Available also in a digital version from Dissertation Abstracts.
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La protection du distributeur intégré en droit français et allemand /Licari, François-Xavier. January 2002 (has links)
Texte remanié de: Th. doct.--Droit privé--Strasbourg 3, 2000. / Bibliogr. p. 643-740. Index. Résumé en allemand.
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Algorithms for the design of VLSI floorplans and logic modules /Young, Fung Yu, January 1999 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 122-130). Available also in a digital version from Dissertation Abstracts.
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Design, fabrication and characterization of an integrated micro heat pipe system /Lee, Man. January 2002 (has links)
Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2002. / Includes bibliographical references (leaves 74-77). Also available in electronic version. Access restricted to campus users.
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Test plan generation technique for complex integrated circuitsLee, Songjun. January 2002 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2002. / Vita. Includes bibliographical references. Available also from UMI Company.
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ELECTRICAL CHARACTERISTICS OF INTEGRATED CIRCUIT PACKAGESSenthinathan, Ramesh, 1961- January 1987 (has links)
No description available.
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The automatic test pattern generation in the logic gate level circuits and MOS transistor circuits at Ohio UniversityLee, Hoon-Kyeu. January 1986 (has links)
Thesis (M.S.)--Ohio University, November, 1986. / Title from PDF t.p.
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A multi-abstraction level platform for the validation and verification of complex digital designsBoland, Jean-François. January 1900 (has links)
Thesis (Ph.D.). / Written for the Dept. of Electrical and Computer Engineering. Title from title page of PDF (viewed 2007/08/29). Includes bibliographical references.
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