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The design of a 16 word 25 bit tunnel-diode memory is described. The memory is word organized and employs destructive readout, the current change of state of the tunnel diodes being sensed. This arrangement requires only a resistor and tunnel diode for each bit stored. The driver circuits for the memory serve three functions: 1) to couple into the array the information to be stored, 2) to supply dc biasing to the array and, 3) to sense the current transient on readout. Low impedance circuits are required, and two approaches are examined: the modified White emitter follower and the transformer coupled emitter follower. The former employs negative feedback to decrease its input impedance, while the latter employs a broadband transformer. The design of the modified White circuit necessitates an examination of the properties of transistors in the 100 Megacycle frequency range. The characteristics of a few high frequency transistors are shown. The transformer coupled circuit depends on the properties of the broadband transformer. These transformers are examined and a design technique for various current ratios is given. Two sets of experimental results are described using 2X2 arrays to simulate the 16X25 memory. One employs 5 ma tunnel diodes, and the other 1 ma tunnel diodes. Using the 1 ma array with transformer input, successful operation with write pulses 10 nanoseconds wide is demonstrated. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

A short history of the electronic data processing development in North America is given. The basic principles of computers and data processing systems are analysed and a brief description of ALWAC III-E and IBM 1620 computers is provided. Sufficient information is given to acquaint professional foresters or research workers in forestry with the basic knowledge required to understand where and how computing can be applied in their work. The major factors that govern how and when to use a computer are: required speed and accuracy, size, repetitiveness, and complexity of the calculation. It is pointed out that the advantages of an electronic computer are: speed, accuracy, versatility, reliability and memory. The disadvantages are: high rental cost, extra cost for transposing data on cards or tape, and complicated program writing. In forestry the main fields of electronic computer applications are: Management Mensuration Utilization Logging engineering Research Examples are presented for each field in the text, typical programs are appended, and sources of further information are noted. It is concluded that in the future the importance of electronic computers will increase in forestry practices; however, it will remain only a tool and cannot replace the forester. / Forestry, Faculty of / Graduate

This thesis describes the development and testing of an analogue computer capable in principle of solving twentieth-degree polynomials with real coefficients, tenth-degree polynomials with complex coefficients, and of performing Fourier synthesis of even and odd functions as well as simulating system-function response curves. A description of the computer components and layout including all necessary power supplies is given. Emphasis is placed on the correct adjustment procedure. Results from illustrative problems verifying the computer operation are given. These results indicate that in favourable cases, accuracies of two significant figures for the modulus and of two degrees for the argument are obtainable for the zeros of a polynomial. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

Some portions of real-time computer process control software can be programmed with special purpose high-level languages. A translator writing system for minicomputers is developed to aid in writing translators for those languages. The translator writing system uses an LR(1) grammar analyzer with an LR(1) skeleton parser. XPL is used as the source language for the semantics. An XPL to intermediate language translator has been written to aid in the translation of XPL programs to minicomputer assembly language. A simple macro generator must be written to translate intermediate language programs into various minicomputer assembly languages. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

A brief survey of list-processing languages and list-processors is made, pointing out the shortcomings of each. The need for a practical, applications-oriented list-processor, along with a list of features that would be required, is then presented. A list-processor that is designed to fulfil these requirements is proposed. The presentation includes a detailed description of the storage structure and management algorithms, the primitive routines that have been defined, plus the routines and features available for dynamic storage allocation and list-processing. Finally, a comparison between the proposed list-processor and two available list-processors, SLIP and DYSTAL, is carried out. / Science, Faculty of / Computer Science, Department of / Graduate

This thesis describes the design and instrumentation of an opaque contour-tracing scanner for studies in optical character recognition (OCR). Most previous OCR machines have attempted to recognize characters by mask matching, a technique which requires a large and expensive computer, and which is sensitive to small changes in type font. Contour tracing is a promising new approach to OCR. In contour tracing, the outside of the character is followed, and the resulting horizontal and vertical co-ordinates, X(t) and Y(t), of the scanning spot are processed for recognition. Although much additional research is required on both scanner design and processing algorithms, it is expected that an OCR device which uses a contour-tracing scanner will be significantly less expensive than existing multifont recognition machines. In this thesis, four possible contour-tracing scanners are proposed and evaluated on the basis of cost, complexity and availability of components. The design that was chosen for construction used an X-Y oscilloscope and a photomultiplier as a flying-spot scanner. In instrumenting this design, a digital-to-analogue converter, an up-down counter and many other special purpose logic circuits were designed and constructed. The scanner successfully contour traced Letraset characters, typewritten characters and handprinted characters. At the machines maximum speed, a character is completely traced in approximately 10 msec. Photographs of contour traces and the X(t) and Y(t) waveforms are included in the thesis. Although the present system will only trace two adjacent characters, proposed modifications to the system would enable an entire line of characters to be contour-traced. Included in the thesis are recommendations for further research on scanner design. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

A display system for a polarity-coincidence digital correlator is described in this thesis. The display of normalized statistical estimates of the computer occurs whenever the sample size equals 2ⁿ ( n = 1, 2, …, 18). This allows one to visually determine convergence of the estimates as they are being computed. A brief description of the correlator is included, permitting the reader to relate more easily its output information and control functions with the display system. The order of magnitude of errors introduced by sampling fluctuations and by the digital-to-analogue conversion is shown to be less than 2% of full scale at the output of the monitoring system (sample size =2¹⁸ ), with about 95% confidence limits assigned to the standard deviation of the correlogram. Displays of the estimates stored in the memory of the computer are illustrated for various modes of operation of the correlator. In particular, it is shown how the display system facilitates observation of the rate of convergence of correlation estimates towards their final values. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

Small special purpose digital computers (SPDG) could be used to control processes for which the cost of general purpose digital, computers is prohibitive. This thesis describes a SPDC to optimize a process for which an exact mathematical model does not exist. The SPDC could use any of the empirical or trial and error methods originally designed for hand calculations or for use on a large general purpose digital computer. The methods discussed in this thesis are gradient search, direct search and random search. The overall operation of a SPDC is described in detail using logic block symbols. From the knowledge gained in building and testing the computer, improvements in circuitry and search strategy are suggested. The logic and circuitry used in a SPDC depend on the nature of the process to be controlled. This is illustrated in the thesis by the description of the optimization of a flotation process. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

This thesis describes a mathematical-graphical analysis and some analog computer simulation studies that were carried out to determine the feasibility of a proposed circuit to be used for analog-to-digital conversion. The circuit analysed and simulated contains a stack of tunnel diodes which are constructed from the same type of semiconductor material. The switching characteristics of this circuit are controlled primarily by the ratios and the values of the capacitances which shunt the individual tunnel diodes and to a lesser extent by the interdiode capacitances. This is revealed in a study of the effects of different circuit parameter variation A two tunnel diode stack circuit (two bits of information capacity) is analysed by studying the nature of the switching trajectories in the proximity of the singular points of the equations describing -the circuit operation. Three different modes of operation, each of which differs in the manner in which the 11 state is reached, are revealed for this circuit. The analysis indicates a feature of the circuit which can be used to determine the final state of the circuit before steady state conditions have been reached. An extension of the two tunnel diode stack circuit to one containing three tunnel diodes yielded eight stable and accessible states. This indicates that the circuit proposed will be able to realize 2[superscript n] states with n tunnel diodes. It is shown that different interdiode capacitance connections will facilitate the achievement of this result. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate