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Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures / Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-coreMéndez Real, Maria 20 September 2017 (has links)
L’évolution technologique ainsi que l’augmentation incessante de la puissance de calcul requise par les applications font des architectures ”many-core” la nouvelle tendance dans la conception des processeurs. Ces architectures sont composées d’un grand nombre de ressources de calcul (des centaines ou davantage) ce qui offre du parallélisme massif et un niveau de performance très élevé. En effet, les architectures many-core permettent d’exécuter en parallèle un grand nombre d’applications, venant d’origines diverses et de niveaux de sensibilité et de confiance différents, tout en partageant des ressources physiques telles que des ressources de calcul, de mémoire et de communication. Cependant, ce partage de ressources introduit également des vulnérabilités importantes en termes de sécurité. En particulier, les applications sensibles partageant des mémoires cache avec d’autres applications, potentiellement malveillantes, sont vulnérables à des attaques logiques de type canaux cachés basées sur le cache. Ces attaques, permettent à des applications non privilégiées d’accéder à des informations secrètes sensibles appartenant à d’autres applications et cela malgré des méthodes de partitionnement existantes telles que la protection de la mémoire et la virtualisation. Alors que d’importants efforts ont été faits afin de développer des contremesures à ces attaques sur des architectures multicoeurs, ces solutions n’ont pas été originellement conçues pour des architectures many-core récemment apparues et nécessitent d’être évaluées et/ou revisitées afin d’être applicables et efficaces pour ces nouvelles technologies. Dans ce travail de thèse, nous proposons d’étendre les services du système d’exploitation avec des mécanismes de déploiement d’applications et d’allocation de ressources afin de protéger les applications s’exécutant sur des architectures many-core contre les attaques logiques basées sur le cache. Plusieurs stratégies de déploiement sont proposées et comparées à travers différents indicateurs de performance. Ces contributions ont été implémentées et évaluées par prototypage virtuel basé sur SystemC et sur la technologie ”Open Virtual Platforms” (OVP). / The technological evolution and the always increasing application performance demand have made of many-core architectures the necessary new trend in processor design. These architectures are composed of a large number of processing resources (hundreds or more) providing massive parallelism and high performance. Indeed, many-core architectures allow a wide number of applications coming from different sources, with a different level of sensitivity and trust, to be executed in parallel sharing physical resources such as computation, memory and communication infrastructure. However, this resource sharing introduces important security vulnerabilities. In particular, sensitive applications sharing cache memory with potentially malicious applications are vulnerable to logical cache-based side-channel attacks. These attacks allow an unprivileged application to access sensitive information manipulated by other applications despite partitioning methods such as memory protection and virtualization. While a lot of efforts on countering these attacks on multi-core architectures have been done, these have not been designed for recently emerged many-core architectures and require to be evaluated, and/or revisited in order to be practical for these new technologies. In this thesis work, we propose to enhance the operating system services with security-aware application deployment and resource allocation mechanisms in order to protect sensitive applications against cached-based attacks. Different application deployment strategies allowing spatial isolation are proposed and compared in terms of several performance indicators. Our proposal is evaluated through virtual prototyping based on SystemC and Open Virtual Platforms(OVP) technology.
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Konstrukční návrh vstřelovacího stroje s posuvnou vstřelovací hlavou o objemu 30dm3 / Design of core shooting machine with a movable head with a capacity 30dm3Lehuta, Tomáš January 2013 (has links)
The aim of this thesis is to perform engineering design core shooting machine. The work is divided into several parts. Home work is dedicated to a process for producing a core and material for the production of cores. It goes chapters that cover basic function, methods of construction core shooting machines. The main part contains the structural design of individual parts core shooting machine by which it was created 3D model (CATIA V5) core shooting machine with a movable head. The structural design of the machine frame is controlled by the finite element method (ANSYS 13.0). In conclusion, risk analysis is performed.
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Opatření pro zmírnění následků těžké havárie reaktoru GFR / Provisions for mitigation of consequences in case of major accidents in GFR nuclear reactorsMlčúch, Adam January 2014 (has links)
This thesis deals with the severe accident of the gas-cooled fast reactor GFR. At the beginning of the study there is a review of the gas-cooled fast reactor subject. Next part is focused on description of possible solutions for severe accidents with emphasis on the solution applied in the Generation III+ reactors. Chapters that deal with material and thermal balance with severe accident of GFR demonstration unit, along with the chapter which analyses features of the corium, create a basis for the conceptual design of core catcher of GFR demonstration unit, which forms the final part of this thesis.
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MULTI-CORE PARALLEL GRAPH ALGORITHMSGUO, BIN January 2023 (has links)
Large sizes of real-world data graphs, such as social networks, communication networks, hyperlink networks, and model-checking networks, call for fast and scalable analytic algorithms. The shared-memory multicore machine is a prevalent parallel computation model that can handle such volumes of data. Unfortunately, many graph algorithms do not take full advantage of such a parallel model. This thesis focuses on the parallelism of two graph problems, graph trimming and core maintenance. Graph trimming is to prune the vertices without outgoing edges; core maintenance is to maintain the core numbers of vertices when inserting or removing edges, where the core number of a vertex can be a parameter of density in the graph. The goal of this thesis is to develop fast, provable, and scalable parallel graph algorithms that perform on shared-memory multicore machines. Toward this goal, we first discuss the sequential algorithms and then propose corresponding parallel algorithms.
The thesis adopts a three-pronged approach of studying parallel graph algorithms from the algorithm design, correctness
proof, and performance analysis. Our experiments on multicore machines show significant speedups over various real and synthetic graphs. / Dissertation / Doctor of Philosophy (PhD) / Graphs are important data structures to model real networks like social networks, communication networks, hyperlink networks, and model-checking networks. These network graphs are becoming larger and larger. Analyzing large data graphs requires efficient parallel algorithms executed on multicore machines. In this thesis, we focus on two graph problems, graph trimming and core maintenance. The graph trimming is to remove the vertices without outgoing edges, which may repeatedly cause other vertices to be removed. For each vertex in the graph, the core number is a parameter to indicate the density; the core maintenance is to maintain the core numbers of vertices when edges are inserted or removed dynamically, without recalculating all core numbers again. We evaluate our methods on a 16-core or 64-core machine over a variety of real and synthetic graphs. The experiments show that our parallel algorithms are much faster compared with existing ones.
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Study of In-Core Flow Blockage by Insulation DebrisBucknor, Matthew David 27 August 2009 (has links)
No description available.
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GePSeA: A General-Purpose Software Acceleration Framework for Lightweight Task OffloadingSingh, Ajeet 14 August 2009 (has links)
Hardware-acceleration techniques continue to be used to boost the performance of scientific codes. To do so, software developers identify portions of these codes that are amenable for offloading and map them to hardware accelerators. However, offloading such tasks to specialized hardware accelerators is non-trivial. Furthermore, these accelerators can add significant cost to a computing system.
Consequently, this thesis proposes a framework called GePSeA (General Purpose Software Acceleration Framework), which uses a small fraction of the computational power on multi-core architectures to offload complex application-specific tasks. Specifically, GePSeA provides a lightweight process that acts as a helper agent to the application by executing application-specific tasks asynchronously and efficiently. GePSeA is not meant to replace hardware accelerators but to extend them. GePSeA provide several utilities called core components that offload tasks on to the core or to the special-purpose hardware when available in a way that is transparent to the application. Examples of such core components include reliable communication service, distributed lock management, global memory management, dynamic load distribution and network protocol processing. We then apply the GePSeA framework to two applications, namely mpiBLAST, an open-source computational biology application and Reliable Blast UDP (RBUDP) based file transfer application. We observe significant speed-up for both applications. / Master of Science
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Aspects of the palaeolimnology of three Norfolk BroadsManson, K. J. January 1987 (has links)
No description available.
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Multi-core architectures with coarse-grained dynamically reconfigurable processors for broadband wireless access technologiesHan, Wei January 2010 (has links)
Broadband Wireless Access technologies have significant market potential, especially the WiMAX protocol which can deliver data rates of tens of Mbps. Strong demand for high performance WiMAX solutions is forcing designers to seek help from multi-core processors that offer competitive advantages in terms of all performance metrics, such as speed, power and area. Through the provision of a degree of flexibility similar to that of a DSP and performance and power consumption advantages approaching that of an ASIC, coarse-grained dynamically reconfigurable processors are proving to be strong candidates for processing cores used in future high performance multi-core processor systems. This thesis investigates multi-core architectures with a newly emerging dynamically reconfigurable processor – RICA, targeting WiMAX physical layer applications. A novel master-slave multi-core architecture is proposed, using RICA processing cores. A SystemC based simulator, called MRPSIM, is devised to model this multi-core architecture. This simulator provides fast simulation speed and timing accuracy, offers flexible architectural options to configure the multi-core architecture, and enables the analysis and investigation of multi-core architectures. Meanwhile a profiling-driven mapping methodology is developed to partition the WiMAX application into multiple tasks as well as schedule and map these tasks onto the multi-core architecture, aiming to reduce the overall system execution time. Both the MRPSIM simulator and the mapping methodology are seamlessly integrated with the existing RICA tool flow. Based on the proposed master-slave multi-core architecture, a series of diverse homogeneous and heterogeneous multi-core solutions are designed for different fixed WiMAX physical layer profiles. Implemented in ANSI C and executed on the MRPSIM simulator, these multi-core solutions contain different numbers of cores, combine various memory architectures and task partitioning schemes, and deliver high throughputs at relatively low area costs. Meanwhile a design space exploration methodology is developed to search the design space for multi-core systems to find suitable solutions under certain system constraints. Finally, laying a foundation for future multithreading exploration on the proposed multi-core architecture, this thesis investigates the porting of a real-time operating system – Micro C/OS-II to a single RICA processor. A multitasking version of WiMAX is implemented on a single RICA processor with the operating system support.
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Sodium lanthanide fluoride nanocrystals: colloidal synthesis, applications as nano-bioprobes, and fundamental investigations on epitaxial growthJohnson, Noah John Joe 20 December 2012 (has links)
The ability to grow materials in the nanometric size regime with controlled shape and size provide a fundamental synthetic challenge, while allowing for evaluation of such unique nanostructures in multiple applications. In this dissertation, colloidal sodium lanthanide fluoride (NaLnF4) nanocrystals are described with an overall emphasis on i) size control, ii) surface chemistry related towards their applications as nano-bioprobes, and iii) the synthesis and fundamental aspects of epitaxial layer growth generally referred as core-shell nanocrystals.
Chapter 1 provides a brief overview on the basic aspects of colloidal nanocrystals. In Chapter 2, synthesis and surface modification of colloidal sodium lanthanide fluoride nanocrystals, epitaxial growth, and their applications in optical and magnetic resonance imaging is reviewed. Chapter 3 describes a phase transfer protocol utilizing polyvinylpyrrolidone and subsequent silica coating of initially hydrophobic upconverting nanocrystals. This protocol is extended in Chapter 4 using end-group functionalized polyvinylpyrrolidone and demonstrates tunability of surface charge and functional groups on upconverting nanocrystals for targeted labeling of human prostate cancer cells. The synthesis of size-tunable NaGdF4 nanocrystals below 10 nm is described in Chapter 5. These nanocrystals are evaluated for their efficacy in magnetic resonance imaging (MRI), and a fundamental insight into the effect of surface gadolinium ions in T1 MRI contrast enhancement is presented. Chapter 6 demonstrates the synthesis of tunable, epitaxial layers on upconverting (core) nanocrystals. A novel synthetic strategy is demonstrated, by deliberate defocusing and self-focusing of differently sized nanocrystals driven by the common physical phenomenon of Ostwald ripening. Utilizing the contraction of lanthanide ions along the series, a fundamental investigation on the effect of compressive/tensile strain epitaxial layer growth is presented in Chapter 7. The fundamental rule of minimal lattice mismatch for epitaxial growth takes into account only the magnitude of mismatch and not the sign of mismatch caused by a compressive/tensile strained layer. A strong asymmetric effect between the compressive/tensile layer growth given the same magnitude of lattice mismatch is observed, demonstrating the necessity of including the sign of mismatch to generate isotropic (conformal)/ pseudomorphic (coherent) epitaxial growth. Finally, in Chapter 8 conclusions and possible future work are discussed. / Graduate / 0494
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The Synthesis of Core-Shell Iron@Gold Nanoparticles and Their CharacterizationBan, Zhihui 21 May 2004 (has links)
Au-coated magnetic Fe nanoparticles have been successfully synthesized by partial replacement reaction in a polar aprotic solvent with about 11 nm core of Fe and about 2.5 nm shell of Au. In this work, a combination of TEM (transmission electron microscopy), XRD (X-ray Powder Diffractometry), EDS (Energy disperse X-ray spectroscopy), SQUID (Superconducting Quantum Interference Device), TGA (Thermograviometric analysis), UV-visible absorption spectroscopy and Faraday rotation were employed to characterize the morphology, structure, composition and magnetic properties of the products. HRTEM images show clear core-shell structure with different crystal lattices from Fe and Au. SQUID magnetometry reveals that particle magnetic properties are not significantly affected by the overlayer of a moderately thick Au shell. The Au-coated particles exhibit a surface plasmon resonance peak that red-shifts from 520 to 680 nm. And all the above characterizations show that in this sample, there are no Fe oxides inside the particle.
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