Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Bibliography: leaf 71. / by David Mark Ryter. / B.S.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Rene Leonardo Cruz. / M.S.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1981. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Vita. / Bibliography: leaves 83-86. / by Moses Hsingwen Ma. / M.S.

Thesis. 1978. M.S.--Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Bibliography: leaves 52-53. / M.S.

Tan, Min. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2008. / Includes bibliographical references (p. 35-36). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgement --- p.iii / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Previous Work --- p.1 / Chapter 1.2 --- Motivation --- p.2 / Chapter 1.3 --- Contributions --- p.2 / Chapter 1.4 --- Thesis Organization --- p.3 / Chapter 2 --- Linear Network Coding Basics --- p.5 / Chapter 2.1 --- Formulation and Example --- p.5 / Chapter 2.2 --- Some Notations --- p.9 / Chapter 3 --- A Unified Framework --- p.13 / Chapter 3.1 --- Generic Network Codes Revisited --- p.13 / Chapter 3.2 --- A Unified Framework --- p.24 / Chapter 3.3 --- Simplified Proofs --- p.29 / Chapter 4 --- Conclusion --- p.33 / Bibliography --- p.35

Fong, Lik Hang Silas. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (leaves 40). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgement --- p.iii / Chapter 1 --- Introduction --- p.1 / Chapter 2 --- Linear Network Code --- p.4 / Chapter 2.1 --- Linear Network Code without Link Failures --- p.4 / Chapter 2.1.1 --- Linear Multicast and Linear Broadcast --- p.6 / Chapter 2.2 --- Linear Network Code with Link Failures --- p.8 / Chapter 2.2.1 --- Static Linear Multicast and Static Linear Broadcast --- p.9 / Chapter 3 --- Variable-Rate Linear Network Coding --- p.11 / Chapter 3.1 --- Variable-Rate Linear Network Coding without Link Failures --- p.11 / Chapter 3.1.1 --- Problem Formulation --- p.11 / Chapter 3.1.2 --- Algorithm and Analysis --- p.12 / Chapter 3.2 --- Variable-Rate Linear Network Coding with Link Failures --- p.23 / Chapter 3.2.1 --- Problem Formulation --- p.23 / Chapter 3.2.2 --- Algorithm and Analysis --- p.23 / Chapter 3.3 --- The Maximum Broadcast Rate of Linear Network Code --- p.28 / Chapter 4 --- Conclusion --- p.38 / Bibliography --- p.40

Bibliography : leaves 225-232. / xii, 232 leaves : ill. ; 30 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / Thesis (Ph.D.)--University of Adelaide, Dept. of Computer Science, 1994

"October 10th, 2001." / Errata included. / Bibliography: p. 179-185. / xii, 185 p. : ill. (some col.) ; 30 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / Looks at algorithms and architectures for implementing low-density parity-check codes to achieve reliable communication of digital data over an unreliable channel. Shows that published methods of finding LDPC codes do not result in good codes. Derives a cost metric for measuring short cycles in a graph due to an edge and proposes an algorithm for constructing codes through the minimisation of the cost metric. An encoding algorithm is derived by considering the parity check matrix as a set of linear simultaneous equations. A parallel architecture for implementing LDPC decoders is proposed and the advantages in terms of throughput and power reduction of this architecture are demonstrated through the implementation of 2 LSPC decoders in a 1.5V 0.16[mu]m CMOS process. / Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 2002

Franklin H. Moss and Adrian Segall. / Bibliography: p. 72. / "September 1978." / Supported by the Advanced Research Project Agency (monitored by ONR) under Contract no. N00014-75-C-1183 Technion Research and Development Foundation Ltd. no. 050-383

Franklin H. Moss and Adrian Segall. / Bibliography: p. 42. / "September 1978." / Supported by the Advanced Research Project Agency (monitored by ONR) under Contract no. N00014-75-C-1183 Technion Research and Development Foundation Ltd. no. 050-383