Tunability and adaptability for radio frequency (RF) front-ends are highly desirable because they not only enhance functionality and performance but also reduce the circuit size and cost. This thesis presents a number of novel design strategies in DC-DC converters, impedance networks and adaptive algorithms for tunable and adaptable RF based mobile telecommunication systems. Specifically, the studies are divided into three major directions: (a) high voltage switch controller based DC-DC converters for RF switch actuation; (b) impedance network designs for impedance transformation of RF switches; and (c) adaptive algorithms for determining the required impedance states at the RF switches. In the first stage, two-phase step-up switched-capacitor (SC) DC-DC converters are explored. The SC converter has a simple control method and a reduced physical volume. The research investigations started with the linear and the non-linear voltage gain topologies. The non-linear voltage gain topology provides a higher voltage gain in a smaller number of stages compared to the linear voltage gain topology. Amongst the non-linear voltage gain topologies, a Fibonacci SC converter has been identified as having lower losses and a higher conversion ratio compared to other topologies. However, the implementation of a high voltage (HV) gain Fibonacci SC converter is complex due to the requirement of widely different gate voltages for the transistors in the Fibonacci converter. Gate driving strategies have been proposed that only require a few auxiliary transistors in order to provide the required boosted voltages for switching the transistors on and off. This technique reduces the design complexity and increases the reliability of the HV Fibonacci SC converter. For the linear voltage gain topology, a high performance complementary-metaloxide- semiconductor (CMOS) based SC DC-DC converter has been proposed in this work. The HV SC DC-DC converter has been designed in low voltage (LV) transistors technology in order to achieve higher voltage gain. Adaptive biasing circuits have been proposed to eliminate the leakage current, hence avoiding latch-up which normally occurs with low voltage transistors when they are used in a high voltage design. Thus, the SC DC-DC converter achieves more than 25% higher boosted voltage compared to converters that use HV transistors. The proposed design provides a 40% power reduction through the charge recycling circuit that reduces the effect of non-ideality in integrated HV capacitors. Moreover, the SC DC-DC converter achieves a 45% smaller area than the conventional converter through optimising the design parameters. In the second stage, the impedance network designs for transforming the impedance of RF switches to the maximum achievable impedance tuning region are investigated. The maximum achievable tuning region is bounded by the fundamental properties of the selected impedance network topology and by the tunable values of the RF switches that are variable over a limited range. A novel design technique has been proposed in order to achieve the maximum impedance tuning region, through identifying the optimum electrical distance between the RF switches at the impedance network. By varying the electrical distance between the RF switches, high impedance tuning regions are achieved across multi frequency standards. This technique reduces the cost and the insertion loss of an impedance network as the required number of RF switches is reduced. The prototype demonstrates high impedance coverages at LTE (700MHz), GSM (900MHz) and GPS (1575MHz). Integration of a tunable impedance network with an antenna for frequency-agility at the RF front-end has also been discussed in this work. The integrated system enlarges the bandwidth of a patch antenna by four times the original bandwidth and also improves the antenna return loss. The prototype achieves frequency-agility from 700MHz to 3GHz. This work demonstrates that a single transceiver with multi frequency standards can be realised by using a tunable impedance network. In the final stage, improvement to an adaptive algorithm for determining the impedance states at the RF switches has been proposed. The work has resulted in one more novel design techniques which reduce the search time in the algorithm, thus minimising the risk of data loss during the impedance tuning process. The approach reduces the search time by more than an order of magnitude by exploiting the relationships among the mass spring’s coefficient values derived from the impedance network parameters, thereby significantly reducing the convergence time of the algorithm. The algorithm with the proposed technique converges in less than half of the computational time compared to the conventional approach, hence significantly improving the search time of the algorithm. The design strategies proposed in this work contribute towards the realisation of tunable and adaptable RF based mobile telecommunication systems.

published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

A novel, variable-gain switched-capacitor DC-DC converter is designed, constructed and tested. The proposed converter minimizes many of the problems which have traditionally hindered switched-capacitor DC-DC converters. The converter has high efficiency, strong regulation and low output voltage ripple across a wide variation in the line and load. The converter utilizes an optimized switching configuration that contains the maximum number of ideal conversion ratios for the given number of capacitors driven by a two-phase clock. The switched-capacitor converter is controlled by a gain-hopping feedforward control scheme in conjunction with duty-cycle, pulse-width modulation feedback control. The proposed control technique enhances the efficiency and regulation capability of switched-capacitor DC-DC converters, which are typically limited when there is a large variation in the line. Because the converter is optimized, programmable and capable of providing buck and/or boost operation (stepping-up and/or stepping-down the input voltage), the new switched-capacitor DC-DC converter is well-suited for a variety of applications and operating conditions. In addition, a novel algorithm based on graph theory and network analysis is developed which enumerates all possible ideal conversion ratios for a given switched-capacitor DC-DC converter structure. In particular, this algorithm can be used as a design tool to greatly improve the operation of multi-gain switched-capacitor converters, where the aim is to maximize the number of ideal conversion ratios while minimizing the number of switches and capacitors. Furthermore, the structure of all attainable positive, ideal conversion ratios of a two-phase switched-capacitor DC-DC converter, utilizing up to five capacitors, is enumerated. As a result, the design process for switched-capacitor converters is greatly simplified and a suitable converter structure can be more easily selected for a given application. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2013-04-03 23:27:24.183

An Integrated Power System (IPS) with a DC Zonal Electrical Distribution System (DC ZEDS) is a strong candidate for the next generation submarine and surface ship. To study the implementation of an IPS with DC ZEDS, members of the Energy Sources Analysis Consortium (ESAC) are currently constructing a reduced-scale laboratory. One fundamental component of DC ZEDS is the Ships Service Converter Module (SSCM), commonly known as a buck DC-DC converter. This thesis documents the design, simulation, construction and testing of a 500V/400V, 8kW resonant soft-switched DC-DC converter. In theory, resonant converters will operate more efficiently and generate less Electromagnetic Interference (EMI) when compared to a standard hard-switched converter. In this thesis, the resonant converter is tested and compared to a hard-switched DC-DC converter that was designed for ESAC's reduced-scaled IPS. The results verify that the resonant DC-DC converter realizes significant efficiency and EMI generation improvements over the hard-switched converter at the cost of a more complex control system and power section. / US Navy (USN) author

M.Ing.

Finally, a four-channel SIMO converter with direct combination but optimal switching sequence for arbitrary converter sequence and converter type is presented. The theoretical optimal 1st-order inductor waveform from this proposed control algorithm is introduced. FCL is involved in this design to realize the algorithm. Moreover, a current-modulated ramp signal, which couples to different controllers, is included to compensate the original deep correlated power stages. By using all of the proposed techniques, Measurement results show that both conduction loss and dynamic loss can be suppressed because of the optimized switching sequence. The load transient response time is around 100mus. The peak efficiency is 89% with a 2.5-V power supply. A maximum output power of 1.66W can be achieved. / Firstly, a pseudo-PWM hysteresis voltage-mode buck converter is proposed. It achieves fast transient speed by the hysteresis control, estimable switching spectrum with a locking frequency and fast mode switching between PWM and PFM depending on the loading change. Measurement results show that the recovery time under the load transient is around 5mus, which is 5 times of the switching period. The boundary of the recovery time is defined by the value of the off-chip inductor. / Switching-mode power converter (SMPC) is an important circuit block in electronic systems. In the modem SMPC system, constant frequency voltage or current-mode control technique is commonly used. However, some limitations are raised due to some preliminary settings in the design. In this thesis, the switching frequency or period is no longer a constant but a design variable. Then, an additional frequency-control loop (FCL) is introduced in order to obtain a fixed frequency operation in the steady state. Three individual designs implemented with different types of FCL are proposed to verify the concept. / Then, a four-channel SIMO converter based on FCL is developed, together with auto-phase allocation technique. This circuit not only solves the problem of imbalance loading of different channels, but it also keeps the idle period of the inductor sufficient short in the full operation region. By combining with all channel controllers, FCL makes fast load transient response without degrading the power efficiency. Moreover, linear auto converter-type adaption technique is also used, which makes the converter surviving from a wide input range and output range. Measurement results show that the proposed converter can achieve a peak efficiency of 89%, a total output power of 1.46W, a load transient response time of less than 70muS, and an idle inductor period of <10%. / Zheng, Yanqi. / Adviser: Leung Ka Nang. / Source: Dissertation Abstracts International, Volume: 73-03, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2010. / Includes bibliographical references. / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [201-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.

With the increasing interest in offshore wind power, the related technologies, including HVDC networks, are gaining similar levels of attention. For large scale wind farms far from shore, high voltage DC transmission can provide several advantages over traditional high voltage AC transmission. This thesis focuses on DC/DC converters, a core part of the HVDC network, especially for use in the high voltage, high power and offshore wind environment. The thesis examines a wide range of possible DC/DC converter topologies for the application. Different topologies are compared and evaluated in detail for use in a high power situation. Based on these results, three DC/DC converter topologies are selected for more detailed modelling. The simulation processes and results are presented in the thesis, which reveals the limitations and behaviour of the topologies when they are used at the MW level. In addition, the high power semiconductor switching devices are discussed and evaluated for each topology. To assess the suitability of the DC/DC converter topologies in the offshore wind application, the selected converter topologies are also analysed and modelled combined with a PMSG wind turbine. Finally, a down-scaled DC/DC converter prototype is built to verify the analysis and simulation results.

In this thesis, a digital-PID-control single-inductor triple-output (SITO) DC-DC converter is realized in AMS 0.35mum CMOS technology. The size of the chip is about 1600 mum x 1700 mum. To improve load current and reduce cross regulation, a Pre-Sub-Period inductor-current regulation is proposed. Based on the maximum duty cycle limiter, an adaptive inductor current adjustment is realized when the duty cycle of the digital PWM signal is larger than the set maximum duty cycle. By an optimized phase control sequence, the S&H stages of the feedback switching and ADC are controlled to on/off with a minimized delay time. Moreover, the control sequence can virtually remove the setting time. / Multiple voltage supplies are necessary to satisfy the different voltage supply requirements of the different on-chip blocks to reduce power consumption in modem electronic devices, such as the modem embedded systems, the portable devices, personal computing devices and wireless communications and imaging systems. For example, WiMAX transmitter includes different sub-blocks: Baseband processor, IQ modulator and power amplifier. Different blocks should operate with the different power supply voltages to satisfy the different requirements. / Single-input multiple-output DC-DC converter is presented to provide the different voltage supplies and reduce the cost on the elements such as the inductor on PCB and save PCB area. Meanwhile, to remove cross regulation and improve load driving capability, the DC-DC converter should operate in the pseudo-continuous mode/discontinuous mode (P-CCM/DCM). However, in the previous designs, the DC current in the inductor is fixed. When the load becomes heavy enough, cross regulation will significantly affect across the different sub-converters. / Jia, Jingbin. / "December 2009." / Adviser: KaNang Leung Alex. / Source: Dissertation Abstracts International, Volume: 72-01, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2010. / Includes bibliographical references (leaves 121-124). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. Ann Arbor, MI : ProQuest Information and Learning Company, [200-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. Ann Arbor, MI : ProQuest Information and Learning Company, [200-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.

Recently, switched capacitor DC/DC converters are extensively used in portable electronic devices because they feature many advantages, such as high efficiency, small package, low quiescent current, minimal external components and low cost. In this thesis, two step-down switched capacitor DC/DC converters are designed. One has the fixed output options 1.5V, 1.8V and 2.0V. The other one has the output 1.2V. These two converters are implemented in 0.5��m CMOS process through National Semiconductor Corporation. The design is verified by the circuit-level simulations, and design issues are discussed. / Graduation date: 2004