International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada / A parallel multi-channel receiver for binary phase shift keyed (BPSK) direct-sequence (DS) spread-spectrum (SS) is introduced in this paper. It adopts a Costas carrier frequency-tracking loop which maintains frequency lock rather than phase lock, and the delay-lock error can be noncoherently obtained to track the PN code. For airborne applications, this method will extend effectively the receiver’s tracking dynamics range for the carrier Doppler shift. A erasable programmable logic device (EPLD) is applied to get the advantage of smaller size and higher flexibility. A high speed microprocessor (TMS320C30) which acts as the processing unit of the receiver is used for acquiring and tracking of the carrier and PN code by digital signal processing algorithms. This receiver is more flexible and is easily improved by reconfiguring the EPLD and modifying the software algorithms. Its fundamental principle is described in the paper.

<p> A new radar tracking detector using fixed delay lines in place of continuously variable delay lines is described. The fixed delays are switched in and out depending on the output of a correlator. Results of a working system are shown using bang-bang feedback and analog-to-digital feedback, for tracking a time-varying delay. </p> / Thesis / Master of Engineering (MEngr)

International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California / At present, multiple mobile targets will be remote controlled in many remote control and telemetry system, in which multiple access technology will be applied. This paper proposes a communication scheme to remote control multiple mobile targets using Coded-Division Multiple Access(CDMA) technique. It's feasibility, advantage and shortcoming are analyzed. Moreover, the key techniques of Direct-Sequence Spread Spectrum(DS/SS) system, i.e. the correlation detection and delay lock-on techniques, are studied and stimulated on the experimental model. The results of theoretical analysis show that the CDMA system has the peculiar advantage over the conventional multiple access system, such as FDMA and TDMA.

The 3D integration of dies promises to address the problem of increased die size caused by the slowing of scaling. By partitioning a design among two or more dies and stacking them vertically, the average interconnect length is greatly decreased and thus power is reduced. Also, since smaller dies will have a higher yield, 3D integration will reduce manufacturing costs. However, this increase in yield can only be seen if manufactured dies can be tested before they are stacked. If not, the overall yield for the die stack will be worse than that of the single, larger die. One of the largest issues with prebond die testing is that, to save power, a single die may not have a complete clock distribution network until bonding. This thesis addresses the problem of prebond die testability by ensuring the clock distribution network on a single die will operate with low skew during testing and at a reduced power consumption during operation as compared to a full clock network. The development of a Delay Lock Loop is detailed and used to synchronize disconnected clock networks on a prebond die. This succeeds in providing a test clock network that operates with a skew that is sufficiently close to the target postbond skew. Additionally, a scheme to increase interdie bandwidth by multiplexing Through-Silicon Vias (TSVs) by the system clock is presented. This technique allows for great increase in the number of effective signal TSVs while imposing a negligible area overhead causing no performance degradation.