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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Unbiased adaptive feedback cancellation in hearing aids

Shusina, Ngwa Abinwi January 2003 (has links)
No description available.
2

A trainable hearing aid

Zakis, Justin Andrew Unknown Date (has links) (PDF)
The main findings of this research project were that under controlled acoustic conditions, a hearing aid can be trained to provide amplification settings that are closer to hypothetical preferred settings than were the initial untrained settings, and in everyday acoustic environments, hearing aid users can train an aid to provide an amplification settings that they prefer to the untrained settings on a significant majority of occasions.
3

Noise Reduction in Digital Hearing Aids Using Environmental Sounds

SUMME, LORI ANN 14 May 2003 (has links)
No description available.
4

Fully Differential Difference Amplifier based Microphone Interface Circuit and an Adaptive Signal to Noise Ratio Analog Front end for Dual Channel Digital Hearing Aids

January 2011 (has links)
abstract: A dual-channel directional digital hearing aid (DHA) front-end using a fully differential difference amplifier (FDDA) based Microphone interface circuit (MIC) for a capacitive Micro Electro Mechanical Systems (MEMS) microphones and an adaptive-power analog font end (AFE) is presented. The Microphone interface circuit based on FDDA converts the capacitance variations into voltage signal, achieves a noise of 32 dB SPL (sound pressure level) and an SNR of 72 dB, additionally it also performs single to differential conversion allowing for fully differential analog signal chain. The analog front-end consists of 40dB VGA and a power scalable continuous time sigma delta ADC, with 68dB SNR dissipating 67u¬W from a 1.2V supply. The ADC implements a self calibrating feedback DAC, for calibrating the 2nd order non-linearity. The VGA and power scalable ADC is fabricated on 0.25 um CMOS TSMC process. The dual channels of the DHA are precisely matched and achieve about 0.5dB gain mismatch, resulting in greater than 5dB directivity index. This will enable a highly integrated and low power DHA / Dissertation/Thesis / Ph.D. Electrical Engineering 2011

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