International Telemetering Conference Proceedings / October 26-29, 1992 / Town and Country Hotel and Convention Center, San Diego, California / The Space Ground Link Subsystem (SGLS) provides full duplex communications for commanding, tracking, telemetry and ranging between spacecraft and ground stations. The up-link command signal is an S-Band carrier phase modulated with the frequency shift keyed (FSK) command data. The command data format is a ternary (S, 1, 0) signal. Command data rates of 1, 2, and 10 Kbps are used. The method presented uses direct digital synthesis (DDS) to generate the SGLS command data and clock signals. The ternary command data and clock signals are input to the encoder, and an FSK subcarrier with an amplitude modulated clock is digitally generated. The command data rate determines the frequencies of the S, 1, 0 tones. DDS ensures that phase continuity will be maintained, and frequency stability will be determined by the microprocessor crystal accuracy. Frequency resolution can be maintained to within a few Hz from DC to over 2 MHZ. This allows for the generation of the 1 and 2 Kbps command data formats as well as the newer 10 Kbps format. Additional formats could be accommodated through software modifications. The use of digital technology provides for encoder self-testing and more comprehensive error reporting.

International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California / Hardware architecture and design details of a multi-channel GPS signal simulator with highly flexibility is presented, while the dynamic performance objectives and the requirements on the hardware architecture are discussed. The IF part of the simulator is implemented almost entirely in the digital domain by use of a field programmable gate array (FPGA), which mainly include C/A code generators, carrier generators, spreaders, and BPSK modulators. The results of testing the proposed simulator hardware architecture at IF with the help of a GPS receiver are presented.

No description available.

International Telemetering Conference Proceedings / October 17-20, 1994 / Town & Country Hotel and Conference Center, San Diego, California / With the increased concerns for reducing cost and improving reliability in today's telemetry systems, many users are employing simulation and automation to guarantee reliable telemetry systems operation. Pre-Mission simulation of the telemetry system will reduce the cost associated with a loss of mission data. In order to guarantee the integrity of the receive system, the user must be able to simulate several conditions of the transmitted signal. These include Doppler shift and dynamic fade simulation. Additionally, the simulator should be capable of transmitting industry standard PCM data streams to allow pre-mission bit error rate testing of the receive system. Furthermore, the simulator should provide sufficient output power to allow use as a boresite transmitter to check all aspects of the receive link. Finally, the simulator must be able to operate at several frequency bands and modulation modes to keep cost to a minimum.

Thesis (PhD)--University of Stellenbosch, 2005. / ENGLISH ABSTRACT: Keywords: software-defined radio, SDR, quadrature mixing, quadrature modulation, quadrature demodulation, digital compensation, software radio, direct-digital synthesis, DDS. An often-stated goal of software-defined transceiver systems is to perform digital signal conversion as close to the antenna as possible by using high-rate converters. In this dissertation, alternative design principles are proposed, and it is shown that the signal processing techniques based on these principles improve on the prior system's accuracy, while maintaining system flexibility. Firstly, it is proposed that digital compensation can be used to reverse the effects of hardware inaccuracies in the RF front-end of a software-defined radio. Novel compensation techniques are introduced that suppress the signal artefacts introduced by typical frontend hardware. The extent to which such artefacts may be suppressed, is only limited by the accuracy by which they may be measured and digitally represented. A general compensation principle is laid down, which formalises the conditions under which optimal compensation may be achieved. Secondly, it is proposed that, in the design of such RF front-ends, a clear distinction should be drawn between signal processing complexity and frequency translation. It is demonstrated that conventional SDR systems often neglect this principle. As an alternative, quadrature mixing is shown to provide a clear separation between the frequency translation and signal processing problems. However, effective use of quadrature mixing as design approach necessitates the use of accurate compensation techniques to circumvent the hardware inaccuracies typically found in such mixers. Quadrature mixers are proposed as general-purpose front-ends for software-defined radios, and quadrature modulation and demodulation techniques are presented as alternatives to existing schemes. The inherent hardware inaccuracies are analysed and simulated, and appropriate compensation techniques are derived and tested. Finally, the theory is verified with a prototype system. / AFRIKAANSE OPSOMMING: Sleutelwoorde: sagteware-gedefinieerde radio, SDR, haaksfasige menging, haaksfasige modulasie, haaksfasige demodulasie, digitale kompensasie, sagteware-radio, direk-digitale sintese, DDS. 'n Gewilde stelling is dat digitale seinomsetting in sagteware-gedefinieerde kommunikasiestelsels so na as moontlik aan die antenna moet geskied deur gebruik te maak van hoëspoed omsetters. Hierdie verhandeling stel alternatiewe ontwerpsbeginsels voor, en toon aan dat hierdie beginsels die eersgenoemde stelsel se akkuraatheid verbeter, terwyl stelselbuigsaamheid gehandhaaf word. Dit word eerstens voorgestel dat digitale kompensasie gebruik word om die effekte van hardeware-onakkuraathede in die RF-koppelvlak van sagteware-gedefinieerde radio's om te keer. Nuwe kompensasietegnieke, wat seinartefakte weens koppelvlak-onakkuraathede kan onderdruk, word aangebied. Die mate waartoe hierdie artefakte onderdruk kan word, word slegs beperk deur die akkuraatheid waarmee dit gemeet en digitaal voorgestel kan word. 'n Algemene kompensasiebeginsel word neergelê waarin die voorwaardes vir optimale kompensasie vasgelê word. Tweedens word voorgestel dat 'n duidelike onderskeid getref word tussen seinverwerkingskompleksiteit en seinverskuiwing in RF-koppelvlakke. Daar word getoon dat konvensionele SDR-stelsels dikwels nie hierdie beginsel handhaaf nie. 'n Alternatief, naamlik haaksfasige menging, word voorgehou as 'n tegniek wat duidelik onderskei tussen seinverskuiwing en seinverwerking. Akkurate kompensasietegnieke is egter nodig om effektief van sulke mengers gebruik te maak. Haaksfasige mengers word voorgestel as veeldoelige koppelvlakke vir sagteware-gedefinieerde radio's, en haaksfasige modulasie- en demodulasietegnieke word voorgestel as plaasvervangers vir bestaande tegnieke. Die inherente hardeware-onakkuraathede word geanaliseer en gesimuleer, en geskikte kompensasietegnieke word afgelei en getoets. Laastens word die teoretiese resultate met 'n praktiese prototipe bevestig.

In this thesis, a direct digital synthesis (DDS) based function generator design module is presented, defined and implemented using two digital hardware modeling/design languages namely SystemC and VHDL. The simulation, synthesis and applicability performances of these two design languages are compared by following all digital hardware design stages. The advantages and open issues of SystemC based hardware design flow are emphasized in order to be a reference for future studies. SystemC initially appeared as a modeling language like HDL design languages. In the last years, SystemC gained popularity also as a hardware design language and it is expected to become alternative to traditional design languages. Using a single platform for hardware modeling, design and verification reduces the spent time and cost. The designed DDS function generator module supports standard I2C and UART communication protocols and it is in ready to use format for digital applications. In this thesis, the function generator module VHDL code is implemented into Xilinx FPGA and verified on the hardware platforms.

The aim of this thesis is introduce readers to the basics of digital frequency synthesis and design of direct digital synthesizer with circuit AD9951 by Analog Devices. The device will be controlled from a PC via RS232. The device will work with internal oscillator, with the ability to connect an external frequency standard.

No description available.

The aim of this thesis is introduce readers to the basics of digital frequency synthesis and design of direct digital synthesizer with circuit AD9951 by Analog Devices. The device will be controlled from a PC via USB. The device works with internal oscillator, with the ability to connect an external frequency standard of 10 MHz. On input is frequency doubler with transistor. Outpu signal is filtered by low-pass filter and amplified by monolitic amplifier ERA-3+.

This thesis describes the theoretical development, design, and implementation of a novel measurement system, called a Sampling Swept Time Delay Short Pulse (SSTDSP) wireless channel sounder, capable of real time in field performance characterization of high speed fixed wireless links. The SSTDSP sounder has been designed to provide vital performance metrics for fixed point high data rate applications in the 28 GHz LMDS band at a fraction of the cost and complexity of existing wideband channel sounders. The SSTDSP sounder monitors the behavior of the LMDS channel by sampling the impulse response of the channel in real time. This digitized impulse response is used to assemble a power delay profile and render real-time channel performance metrics such as the mean excess delay, RMS delay spread, maximum excess delay for a given multipath threshold, and coherence bandwidth. The SSTDSP sounder is capable of recording these metrics through three modes of operation - continuous channel monitoring, single instant channel snapshot, or data logging. Swept time delay time dilation processing is combined with precise sample and hold gating to reduce the analog to digital converter sampling rate required to digitize the nanosecond short pulses from 2 Gsps to 1 Msps, while retaining the required effective Nyquist sampling rate of 2 Gsps. This dramatically reduces the memory, digital signal processing, and data logging storage requirements as well as the overall cost of the sounder system. The thesis presents the theory behind channel sounding and discusses whether there is a "bounce path" available to LMDS. Several existing channel sounding methods are compared for this application. A number of specific design and performance criteria from each of these methods are synthesized to produce the Sampling Swept Time Delay Short Pulse Sounder architecture. The design and implementation process used to realize the SSTDSP sounder is presented, including a system overview, module details, and algorithm development details. A calibration and measurement test procedure is outlined and system verification results are presented. Current work in progress on the test platform and future improvements to the modular system are outlined, as well as conclusions and future implications of the system. / Master of Science