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Call number: LD2668 .T4 1961 H62

published_or_final_version / Statistics and Actuarial Science / Doctoral / Doctor of Philosophy

The purpose of this experiment was to implement an alternative mapping realization of the hierarchical abstract simulator on the Intel Multibus 1 microprocessor system. Utilizing three 286/10 single board computers, integration of the M286 monitor with the hierarchical abstract simulator algorithm and execution of the distributed simulator system (DSS) was studied. Seven experiments were done on the DSS showing that the DSS correctly executes the algorithm of the hierarchical abstract simulator. An additional benefit is that parallelism is achieved even without external input: one simulator executes the internal transition function, with other executing the external transition function. This system has demonstrated that the hierarchical abstract simulator concept can be implemented on present-day, available hardware.

by Wong Yiu Kwong. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1980. / Bibliography: leaves 82-83.

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Thesis (M.S.)--West Virginia University, 2008. / Title from document title page. Document formatted into pages; contains ix, 51 p. : ill. Includes abstract. Includes bibliographical references (p. 46-51).

Thesis (Ph. D.)--University of Hong Kong, 2002. / Includes bibliographical references (leaves 122-132).

Discrete-event simulation appears to be an ideal candidate for parallel processing not only because many large-scale simulations take extremely long execution times on conventional computers but also because the systems being modelled often contain considerable amounts of intrinsic parallelism. Ability to simulate large models in a reasonable time is the motivation for seeking speed advantages offered by parallel computer systems. The Connection Machine is an example of a massively parallel computer with a general communications network in which any processor can communicate with any other that is well suited for the DEVS (Discrete Event System Specification) broadcast models simulation. However, a new approach is required to mapping the DEVS abstract simulator onto a SIMD architecture such as that of the Connection Machine CM-2. This dissertation extends the DEVS formalism to allow the exploitation of data parallelism afforded by a massively parallel SIMD architecture. A broadcast model simulation environment is implemented in *Lisp on the Connection Machine CM-2. Two examples of parallel processor models are presented for demonstration. Several runs are made on the implementation using the Parallel Processor Broadcast Architecture model. The experimental results are compared to those from DEVS-Scheme running on sequential machines such as the Sun-4 workstation and the Motorola Delta 88K MultiPersonal Computer using the same model. The results show that simulations on the CM-2 are approximately 150 times faster. In addition, to get some insight on the effect of increasing the number of processors of a SIMD architecture (i.e., the size of the broadcast model simulated), runs were made to measure the execution times. The execution results confirm our analysis pointing to imitations in the SIMD architecture for exploiting DEVS internal event parallelism.

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