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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design and Analysis of Compact Square-Root-Domain Filters

Cheng, Meng-yang 25 July 2007 (has links)
In this thesis, a second-order low pass square root domain filter (SRD filter) based on operational transconductors amplifiers (OTAs) is presented. The SRD filter consists of two translinear filters and four OTAs. Because the OTA has small voltage swings, which may violate the large signal natural of the SRD filter. We investigate the dynamic range of this compact SRD filter with different quality factor(Q). The circuit has fewer numbers of transistors and operate in low voltage, therefore, it has less power consumption and less chip area. The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage 1.5V and the biasing current varies from 10uA to 80uA. Measurement results lts show that Im/I0≥40% when the external capacitance C is 3.5pF¡B7pF and Im/I0≥53% when the external capacitance C is 3pF¡B8.5pF. The cutoff frequency of the filter can be tuned from 1.24MHz to 5.53MHz when the external capacitance C is 3.5pF¡B7pF and the cutoff frequency can be tuned from 900KHz to 4.46MHz when the external capacitance C is 3pF¡B8.5pF. The total harmonic distortion is 0.908% and the power consumption is 506£gW.
2

A Log-Domain Filter Based On CMOS Pseudo-Exponential Circuit

Chang, Hsiu-Cheng 31 July 2008 (has links)
In this thesis, a CMOS tunable second-order log-domain filter using pseudo-exponential approximation is proposed. MOSFETs in the circuit are working in the saturation region. This filter has higher frequency response than that of weak inversion CMOS filter. The circuit has been fabricated with 0.35um CMOS technology. It operates with a supply voltage 3V, internal capacitance C is 1pF, the biasing current varies from 2uA~10uA. The cutoff frequency can be turned from 2MHz~37.5MHz. The harmonic distortion is 0.93% and the power consumption is 772uW.
3

1.5V Square-Root Domain Filter

Lai, Jui-chi 24 July 2009 (has links)
Conventional gm-c filters have limited voltage swings in low voltage operation. CMOS companding filters replace gm-c filters in low voltage environment for high dynamic range. The square-root domain filter and log-domain filter belongs to this companding filter category. In this thesis, a second order low pass square root domain filter (SRD filter) based on the up-down TL (translinear loop) circuit structure is presented. The SRD filter consists of four geometric-mean cells and three squarer/divider cells. The advantages of the proposed circuits are low supply voltage, low power consumption, high bandwidth, and low total harmonic distortion (THD). The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage of 1.5V, and the bias current varies from 0.5£gA to 30£gA. Measurement results show that the cutoff frequency can be tuned from 3.12MHz to 8.11MHz when the Capacitance (C) is 5pF.The total harmonic distortion is 0.28%, and the power consumption is 1.09mW.
4

A Tunable Log-Domain Filter Using Vertical Bipolar Junction Transistor

Lin, Hsin-hsiu 25 July 2007 (has links)
Traditionally, the design of continuous time active filters usually has a trade offbetween low-voltage and high dynamic range. One way to solve this problem is companding technology. There are two methods for companding filters. The first method utilizes the exponential I-V characteristics of BJT in the saturation region. In order to reduce the cost andintegrate the analog and digital circuits, the other method was exploited using CMOS process. In this project, a new first-order low pass log-domain filter based on CMOS parasitic vertical BJTwill be proposed. This filter has higher frequency response than previous circuits. We will first employ Hspice to simulate the log-domain filter to ensure the correctness of the circuit and make it a reliable reference with the circuit layout. After summarizing all the simulations and analyses, the chip will be fabricated with 0.35um CMOS technology.
5

Low Voltage Low Power Square-Root-Domain Filter

Lo, Wan-Chen 03 July 2006 (has links)
In this thesis, a brand new first-order low pass square root domain filter (SRD filter) based on operational transconductors amplifiers (OTAs) is presented. The SRD filter consists of a translinear filter and two OTAs. We improve Cruz¡¦s SRD filter [15], reduce the number of transconductors from 3 to 2, and replace Class-AB linear transconductors with OTAs. The circuit has the least number of transistors up to date, therefore, the least power consumption and least chip area. The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage 1.5V and the biasing current varies from 0.05uA to 15uA. Measurement results show that the cutoff frequency of the filter can be tuned from 250 Hz to 29 kHz when the external capacitance C is 1nF and the cutoff frequency can be tuned from 1.8 kHz to 237kHz when the external capacitance C is 100pF. The total harmonic distortion is 1.03% and 1.01% when the external capacitance C is 1nF and 100pF and the power consumption is 116£gW.
6

A Square Root Domain Filter with Translinear Principle

Chang, Shih-Hao 07 August 2008 (has links)
In this thesis, a first order low pass square root domain filter (SRD filter) based on the novel operational transconductor amplifiers (OTAs) is presented. The SRD filter consists of a translinear filter and two OTAs. Because the conventional OTA has small input voltage swings, which violates the large signal operation of a SRD filter. We propose the novel OTA which is based on the large signal behaviors of MOSFETs, and the OTA also has large signal operation. We improve Cruz¡¦s SRD filter [22], reduce the number of the transconductors from 3 to 2, and replace Class-AB linear transconductors with the proposed OTAs. The MOSFET count of whole circuit can be reduced. Therefore, the OTAs have many advantages: wider input voltage swing, low supply voltage, low power consumption, and small chip area. The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage 1.5V and the bias current varies from 0.3£gA to 15£gA. Measurement results show that the cutoff frequency can be tuned from 1.1kHz to 35.2kHz when the external capacitance C is 1nF and the cutoff frequency can be tuned from 8.7kHz to 310.4kHz when the external capacitance C is 100pF. The total harmonic distortions are 0.93% and 0.91% when the external capacitances C are 1nF and 100pF, and the power consumption is 152.29£gW.
7

Design of an Analog VLSI Cochlea

Shiraishi, Hisako January 2003 (has links)
The cochlea is an organ which extracts frequency information from the input sound wave. It also produces nerve signals, which are further analysed by the brain and ultimately lead to perception of the sound. An existing model of the cochlea by Fragni`ere is first analysed by simulation. This passive model is found to have the properties that the living cochlea does in terms of the frequency response. An analog VLSI circuit implementation of this cochlear model in CMOS weak inversion is proposed, using log-domain filters in current domain. It is fabricated on a chip and a measurement of a basilar membrane section is performed. The measurement shows a reasonable agreement to the model. However, the circuit is found to have a problem related to transistor mismatch, causing different behaviour in identical circuit blocks. An active cochlear model is proposed to overcome this problem. The model incorporates the effect of the outer hair cells in the living cochlea, which controls the quality factor of the basilar membrane filters. The outer hair cells are incorporated as an extra voltage source in series with the basilar membrane resonator. Its value saturates as the input signal becomes larger, making the behaviour rather closer to that of a passive model. The simulation results show this nonlinear phenomenon, which is also seen in the living cochlea. The contribution of this thesis is summarised as follows: a) the first CMOS weak inversion current domain basilar membrane resonator is designed and fabricated, and b) the first active two-dimensional cochlear model for analog VLSI implementation is developed.
8

Design of an Analog VLSI Cochlea

Shiraishi, Hisako January 2003 (has links)
The cochlea is an organ which extracts frequency information from the input sound wave. It also produces nerve signals, which are further analysed by the brain and ultimately lead to perception of the sound. An existing model of the cochlea by Fragni`ere is first analysed by simulation. This passive model is found to have the properties that the living cochlea does in terms of the frequency response. An analog VLSI circuit implementation of this cochlear model in CMOS weak inversion is proposed, using log-domain filters in current domain. It is fabricated on a chip and a measurement of a basilar membrane section is performed. The measurement shows a reasonable agreement to the model. However, the circuit is found to have a problem related to transistor mismatch, causing different behaviour in identical circuit blocks. An active cochlear model is proposed to overcome this problem. The model incorporates the effect of the outer hair cells in the living cochlea, which controls the quality factor of the basilar membrane filters. The outer hair cells are incorporated as an extra voltage source in series with the basilar membrane resonator. Its value saturates as the input signal becomes larger, making the behaviour rather closer to that of a passive model. The simulation results show this nonlinear phenomenon, which is also seen in the living cochlea. The contribution of this thesis is summarised as follows: a) the first CMOS weak inversion current domain basilar membrane resonator is designed and fabricated, and b) the first active two-dimensional cochlear model for analog VLSI implementation is developed.

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