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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Unitary Space-Time Transmit Diversity for Multiple Antenna Self-Interference Suppression

Anderson, Adam Lane 13 July 2004 (has links) (PDF)
A common practice for government defense agencies and commercial aeronautical companies is to use dual antennas on test flight air vehicles in order to overcome occlusion issues during high-speed telemetric maneuvers. The dual antennas, though never being masked at the same time, unfortunately lead to a drastic increase in nulls in the signal pattern. The result of this interference pattern can be compared to the effect of fading in a multiple-input multiple-output (MIMO) multi-path scattering environment. Confidence in this comparison leads to the use of unitary space-time MIMO codes to overcome the signal self-interference. The possibility and performance of several of these codes will be examined. Such criteria as training for channel estimation, use of shaped offset quadrature phase shift keying (SOQPSK), hardware facility, and data throughput will be compared for each code. A realistic telemetry channel will be derived to increase accuracy of simulated results and conclusions.
2

ANALÝZA MOŽNOSTÍ SIMULÁCIE A IMPLEMENTÁCIE AUTOSYNCHRÓNNYCH SUBSYSTÉMOV V OBVODOCH VLSI / SIMULATION AND IMPLEMENTATION ANALYSIS OF THE AUTOSYNCHRONOUS SUBSYSTEMS IN VLSI DEVICE

Kováč, Michal January 2010 (has links)
This thesis focuses on problem-solution analysis of synchronous digital circuits; the results of which are autosynchronous circuit design methodology, timing parameter definitions based on simulation models and constraint settings. The RTL transformation of the synchronous state machine in VHDL language to an autosynchronous state machine was created with minimal modifications for the simple design of these circuits. Following this, a comparison of the transformed state machines with their synchronous originals in parameters such as chip area, current consumption and timing specification domain is introduced. The summation of this thesis displays a theoretical comparison of several types of synchronization (synchronous, autosynchronous, fundamental asynchronous, EAIC, Bundled-data, Dual-rail) which are presented on the single state machine example with the same technology parameters.

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