This thesis presents and investigates Space Vector Modulation (SVM) switching strategies for (i) a multi-level Diode-Clamped Converter (DCC) and (ii) a multi-module Voltage-Sourced Converter (VSC) system in which each module is a conventional two-level VSC. Although the SVM strategies are general and applicable for n-level DCC and n-module VSC systems, this text only concentrates on five-level DCC and four-module VSC systems. For a five-level DCC, a computationally efficient SVM algorithm is proposed. The algorithm, that is based on a classifier Neural Network (NN), reduces the computational time for the SVM realization. Therefore, adequate saving of processor execution time, in each sampling period of SVM, is provided to carry out other functions, e.g. the calculations required for DC-capacitor voltage balancing task. The thesis also proposes a DC-capacitor voltage balancing strategy to counteract the voltage drift phenomenon of (i) a passive-front-end five-level DCC, and (ii) a back-to-back connected five-level DCC system. The proposed balancing strategy, that is based on augmenting the proposed SVM algorithm, takes advantage of the redundant switching states to minimize a quadratic cost function associated with voltage deviations of the DC-capacitors. The salient features of the proposed balancing strategy are (i) online calculation of SVM to select the best switching states, (ii) minimization of switching frequency, (iii) minimization of the THD content of the AC-side voltage, and (iv) no requirement for additional power circuitry. For a four-module VSC system a sequential sampling SVM strategy is proposed. The proposed strategy (i) provides harmonic cancellation/minimization at the net AC-side voltage of the multi-module VSC system, and (ii) offers a low switching frequency for each VSC module. Technical feasibility of the proposed SVM strategies for a five-level DCC and a four-module VSC system, as a STATCOM and a back-to-back HVDC system, are investigated and presented. The studies are conducted in the time-domain, in the PSCAD/EMTDC software environment.

This thesis presents and investigates Space Vector Modulation (SVM) switching strategies for (i) a multi-level Diode-Clamped Converter (DCC) and (ii) a multi-module Voltage-Sourced Converter (VSC) system in which each module is a conventional two-level VSC. Although the SVM strategies are general and applicable for n-level DCC and n-module VSC systems, this text only concentrates on five-level DCC and four-module VSC systems. For a five-level DCC, a computationally efficient SVM algorithm is proposed. The algorithm, that is based on a classifier Neural Network (NN), reduces the computational time for the SVM realization. Therefore, adequate saving of processor execution time, in each sampling period of SVM, is provided to carry out other functions, e.g. the calculations required for DC-capacitor voltage balancing task. The thesis also proposes a DC-capacitor voltage balancing strategy to counteract the voltage drift phenomenon of (i) a passive-front-end five-level DCC, and (ii) a back-to-back connected five-level DCC system. The proposed balancing strategy, that is based on augmenting the proposed SVM algorithm, takes advantage of the redundant switching states to minimize a quadratic cost function associated with voltage deviations of the DC-capacitors. The salient features of the proposed balancing strategy are (i) online calculation of SVM to select the best switching states, (ii) minimization of switching frequency, (iii) minimization of the THD content of the AC-side voltage, and (iv) no requirement for additional power circuitry. For a four-module VSC system a sequential sampling SVM strategy is proposed. The proposed strategy (i) provides harmonic cancellation/minimization at the net AC-side voltage of the multi-module VSC system, and (ii) offers a low switching frequency for each VSC module. Technical feasibility of the proposed SVM strategies for a five-level DCC and a four-module VSC system, as a STATCOM and a back-to-back HVDC system, are investigated and presented. The studies are conducted in the time-domain, in the PSCAD/EMTDC software environment.

The outstanding features of modular multilevel converters (MMC) have recently gained much attention in the high-voltage direct-current (HVDC) transmission field. Power quality, converter cost and system performance are three crucial aspects of HVDC MMCs which are directly linked to the converter modulation and switching schemes. High power quality and performance require high switching frequency and large cell capacitor whereas low switching frequency and small cell capacitor are needed to reduce the converter cost. The main objective of this thesis is to propose a practical switching method for HVDC MMCs which balances the aforementioned contradictory requirements. A mathematical analysis of the converter switching pattern, against the power quality and converter cost, has been conducted to formulate an optimization problem for MMCs. Different objective functions are studied for the formulated optimization problem such as converter loss minimization, voltage imbalance minimization and computational burden minimization. This thesis proposes three methods to address different objective functions. Ultimately, a real-time simulator has been built to practically verify and investigate the performance of the proposed methods in a realistic point-to-point HVDC link. The most significant outcome of this thesis is the tolerance band-based switching scheme which offers a direct control of the cell capacitor voltage, low power losses, and robust dynamic performance. As a result, the converter switching frequency can reach frequencies as low as 70 Hz (with the proposed cell tolerance band (CTB) method). A modified optimized CTB method is proposed to minimize the converter switching losses and it could reduce the converter switching losses by 60% in comparison to the conventional phase shifted carrier modulation method. It is concluded intelligent utilization of sorting algorithm can enable efficient HVDC station operation by reducing the converter cost. / <p>QC 20160916</p>