51 |
Intelligent circuit recognition for VLSI layout verification /Griffin, Glenn. January 1993 (has links)
Report (M.S.)--Virginia Polytechnic Institute and State University. M.S. 1993. / Abstract. Includes bibliographical references (leaves 18-20). Also available via the Internet.
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52 |
New tests and test methodologies for scan cell internal faultsYang, Fan. Reddy, Sudhakar M. Chakravarty, Sreejit. January 2009 (has links)
Thesis supervisors: Sudhakar M. Reddy, Sreejit Chakravarty. Includes bibliographic references (p. 129-139).
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53 |
Performance and power dissipation optimizations for high-speed VLSI interconnect designs /Li, Ruiming. January 2005 (has links)
Thesis (Ph.D.) -- University of Texas at Dallas, 2005. / Includes vita. Includes bibliographical references (leaves 118-129)
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54 |
SPICE-accurate iterative methods for efficient time-domain simulation of VLSI circuits with strong parasitic couplings /Li, Zhao, January 2005 (has links)
Thesis (Ph. D.)--University of Washington, 2005. / Vita. Includes bibliographical references (leaves 95-101).
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55 |
Quasi-optical treatment of the output grating couplerPeters, Steven J. January 1982 (has links)
Thesis (M.S.)--University of Wisconsin--Madison, 1982. / Typescript. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaf 59).
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56 |
Model compiler driven device modeling and circuit simulation /Hu, Bo, January 2006 (has links)
Thesis (Ph. D.)--University of Washington, 2006. / Vita. Includes bibliographical references (leaves 85-88).
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57 |
40 Gbps SiGe pattern generator IC with variable clock skew and output levelsZahller, Matthew John, January 2006 (has links) (PDF)
Thesis (M.S. in electrical engineering)--Washington State University, December 2006. / Includes bibliographical references (p. 42).
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58 |
Design of radix 4 divirs using high redundancy in 65 nanometer CMOS technologyPham, Tung Nang, January 1900 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2005. / Vita. Includes bibliographical references.
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59 |
Chip characterization : man-hour reduction and increased functionality testing with automation improvements /Murphy, Robert C., January 1900 (has links)
Thesis (M.S.)--Texas State University-San Marcos, 2007. / Vita. Includes bibliographical references (leaves 164-166).
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60 |
Parametric testing, characterization and reliability of integrated circuitsDatta, Ramyanshu. January 1900 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.
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