31 |
Macromodeling and simulation of high-performance mixed Analog/Digital circuits /Chang, Yu-Hsu Henry. January 1994 (has links)
Thesis (Ph. D.)--University of Washington, 1994. / Vita. Includes bibliographical references (leaves [93]-98).
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32 |
A formal model for behavioral test generation /Cho, Chang H., January 1994 (has links)
Thesis (Ph. D.)--Virginia Polytechnic Institute and State University, 1994. / Vita. Abstract. Includes bibliographical references (leaves 159-163). Also available via the Internet.
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33 |
TENOR : an ATPG for transition faults in combinational circuits /Tyagi, Dhawal, January 1994 (has links)
Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1994. / Vita. Abstract. Includes bibliographical references (leaves 70-72). Also available via the Internet.
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34 |
Setting CMOS environment for VLSI designChung, Chih-Ping. January 1989 (has links)
Thesis (M.S.)--Ohio University, November, 1989. / Title from PDF t.p.
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35 |
VLSI implementation of control section of overlapped 3-bit scanning 64-bit multiplierMontalvo Ramirez, Luis Anibal. January 1986 (has links)
Thesis (M.S.)--Ohio University, August, 1986. / Title from PDF t.p.
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36 |
Global routing and pin assignment for multi-layer chip-level layout /Liu, Le-Chin Eugene. January 1997 (has links)
Thesis (Ph. D.)--University of Washington, 1997. / Vita. Includes bibliographical references (leaves [78]-83).
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37 |
Architectural retiming : a technique for optimizing latency-constrained circuits /Hassoun, Soha M. N. January 1997 (has links)
Thesis (Ph. D.)--University of Washington, 1997. / Vita. Includes bibliographical references (leaves [151]-154).
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38 |
A built-in self-test PLA generator /Dhawan, Sanjay, January 1991 (has links)
Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1991. / Vita. Abstract. Includes bibliographical references (leaves 87-90). Also available via the Internet.
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39 |
Modeling of lossy multiconductor transmission lines for the design of high-speed IC interconnects /You, Hong. January 1990 (has links)
Thesis (Ph. D.)--University of Washington, 1990. / Vita. Includes bibliographical references (leaves [111]-115).
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40 |
VLSI circuit defect diagnosis : open defects and run-time speedLiu, Chen. January 2008 (has links)
Thesis (Ph. D.)--University of Iowa, 2008. / Thesis supervisor: Sudhakar M. Reddy. Includes bibliographical references (leaves 118-122).
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