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Modular exponentiation and modular multiplication are the most used operations in current cryptographic systems. Some well-known cryptographic algorithms, such as RSA, Diffie-Hellman key exchange, and DSA, require modular exponentiation operations. This is performed with a series of modular multiplications to the extent of its exponent in a certain fashion depending on the exponentiation algorithm used. Cryptographic functions are very likely to be applied in current applications that perform information exchange to secure, verify, or authenticate data. Most notable is the use of such applications in Internet based information exchange. Smart cards, hand-helds, cell phones and many other small devices also need to perform information exchange and are likely to apply cryptographic functions. A hardware solution to perform a cryptographic function is generally faster and more secure than a software solution. Thus, a fast and area efficient modular exponentiation hardware solution would provide a better infrastructure for current cryptographic techniques. In certain cryptographic algorithms, very large precisions are used. Further, the precision may vary. Most of the hardware designs for modular multiplication and modular exponentiation are fixed-precision solutions. A scalable Montgomery Multiplier (MM) to perform modular multiplication has been proposed and can operate on input values of any bit-size, but the maximum bit-size should be known and is the limiting factor. The multiplier can calculate any operand size less than the maximal precision. However, this design's parameters should be optimized depending on the operand precision for which the design is used. A software application was developed in C to find the optimized design for the scalable MM module. It performs area-time trade-off for the most commonly used precisions in order to obtain a fast and area efficient solution for the common case. A modular exponentiation system is developed using this scalable multiplier design. Since the multiplier can operate on any operand size up to a certain maximum value, the exponentiation system that utilizes the multiplier will inherit the same capability. This thesis work presents the design and implementation of an exponentiation algorithm in hardware utilizing the optimized scalable Montgomery Multiplier. The design uses a parallel exponentiation algorithm to reduce the total computation time. The modular exponentiation system experimental results are analyzed and compared with software and other hardware implementations. / Graduation date: 2002

A configuration-oriented circuit model for multiple coupled lines in an inhomogeneous medium is developed and presented in this thesis. This circuit model consists of a network of uncoupled transmission lines and is readily modeled with simulation tools like LIBRA�� and SPICE��. It provides an equivalent circuit representation which is simple and topologically meaningful as compared to the model based on modal decomposition. The configuration-oriented model is derived by decomposing the immittance matrices associated with an n coupled line 2n-port system. Time- and frequency-domain simulations of typical coupled line multiports are included to exemplify the utility of the model. The model is useful for the simulation and design of general single and multilayer coupled line components, such as filters and couplers, and for the investigation of signal integrity issues including crosstalk in interconnects associated with high speed digital and mixed signal electronic modules and packages. It is shown that multiconductor lossless structures in an inhomogeneous medium can be characterized by multiport time-domain reflection (TDR) measurements. A synthesis technique of an equivalent lossless (non-dispersive) uniform multiconductor n coupled lines (UMCL) 2n-port system from the measured discrete time-domain reflection response is presented. This procedure is based on the decomposition of the characteristic immittance matrices of the UMCL in terms of partial mode immittance matrices. The decomposition scheme leads to the discrete transition matrix function of a UMCL 2n-port system. This in turn establishes a relationship between the normal-mode parameters of the UMCL and the measured impulse reflection and transmission response. Equivalence between the synthesis procedure presented in this thesis and the solution of a special form of an algebraic Riccati matrix equation whose solution can lead to the normal-mode parameters and a real termination network is illustrated. In order to demonstrate the procedure, a typical microstrip structure with three lines is synthesized from the time-domain reflection (TDR) data. In order to compliment known field theoretic techniques for characterization of multiconductor structures a network analog method is employed to solve the magnetic vector potential equation to characterize multilayer Metal-Insulator-Semiconductor (MIS) transmission line structures. This approach leads to the frequency dependent distributed inductance and the resistance matrices of a multilayer MIS transmission line structure. It is shown that the frequency dependent transmission line parameters can be modeled by an efficient quasi-static formulation for all propagating modes including the slow-wave and skin-effect modes. To demonstrate the proposed approach for single and multilevel structures, the frequency dependent distributed inductance and resistance matrices corresponding to the propagating modes classified as the slow-wave and skin-effect modes are calculated and validated by comparison with full-wave solutions. / Graduation date: 1999

The advent of low-cost RFIC's fabricated in Silicon-based technologies has led to the use of monolithic lumped elements which are located on-die. While it is clearly advantageous to have a high degree of integration and thus fewer off chip elements, parasitic losses due to semiconducting substrate effects can be a performance-limiting factor. Microstrip spiral inductors are key components in many high frequency circuit designs, including MMIC's, RFIC's, and mixed-signal modules. However, the losses associated with spirals fabricated in a lossy substrate environment, such as in CMOS and bipolar technologies, are not accurately modeled by the current conventional techniques. This thesis presents a complete modeling technique for spiral inductors over such 'high-loss' substrates. The quasi-static solution for single and coupled Metal-Insulator-Substrate (MIS) microstrip structures has led to the development of methods for calculating the self and mutual line parameters r, l, g, and c, which are in turn utilized in the model for the microstrip spiral inductors in the same environment. The equivalent circuit model for the spiral inductors is based on the conventional low-loss spiral models with the inclusion of frequency-dependent losses due to semiconducting substrates. The distributed model for spirals in CMOS-based RFICs incorporates inductance calculations by the Partial Element Equivalent Circuit (PEEC) method, augmented by inductance and resistance calculations for the so-called skin effect mode by the spectral domain technique. In addition, the capacitances and shunt conductances can be computed by a Poisson solver for layered lossy media; both network analog and spectral domain methods are also used to find the shunt admittance per unit length for the microstrip structure as a fundamental element of the spiral. Simulations for typical structures have been performed to validate the modeling techniques via comparison with a commercial simulator and network analyzer measurements for a 9.5 turn spiral in CMOS for RFIC applications. / Graduation date: 1999

Spiral inductors are a key component of mixed-signal and analog integrated circuits (IC's). Such circuits are often fabricated using silicon-based technology, owing to the inherent low-cost and high volume production aspects. However, semiconducting substrate materials such as silicon can have adverse effects on spiral inductor performance due to the lossy nature of the material. Since the operating requirements of many high performance IC's demand reactive components that have high Quality Factor's (Q's), and are thus low loss devices, the need for accurate modeling of such structures over lossy substrate media is key to successful circuit design. The Q's of commonly available off-chip inductors are in the range of 50- 100 for frequencies ranging up to a few gigahertz. Since off-chip inductors must be connected through package pins, solder bumps, etc., which all contribute additional loss and thus lower the apparent Q of an external device, the typical on-chip Q requirement for a given RFIC design is generally lower than that for an off-chip spiral solution. However, a spiral inductor that was designed and fabricated originally in a low loss technology such as thin-film alumina may have substantially worse performance in regard to Q if it is used in a silicon-based technology, owing to the conductive substrate. For this reason, it is imperative that semiconducting substrate effects be accurately accounted for by any modeling effort for monolithic spirals in RFICs. This thesis presents a complete modeling solution for both single and multi-level spiral inductors over lossy silicon substrates, along with design considerations and methods for mitigation of the undesirable performance effects of semiconducting substrates. The modeling solution is based on Spectral Domain Approach (SDA) solutions for frequency dependent complex capacitive (i.e. both capacitance and conductance) parasitic elements combined with a quasi-magnetostatic field solution for calculation of the frequency dependent complex inductive (i.e. both inductance and resistance) terms. The effects of geometry and process variations are considered as well as the incorporation of Patterned Ground Shields (PGS) for the purpose of Q enhancement. Proposals for future extensions of this work are discussed in the concluding chapter. / Graduation date: 2006

The focus of this work is on the steady-state analysis of RE circuits using a coupled device and circuit simulator. Efficient coupling algorithms for both the time-domain shooting method and the frequency-domain harmonic balance method have been developed. A modified Newton shooting method considerably improves the efficiency and reliability of the time-domain analysis. Three different implementation approaches of the harmonic balance method for coupled device and circuit simulation are investigated and implemented. These include the quasi-static, non-quasi-static, and modified-Volterra-series approaches. Comparisons of simulation and performance results identify the strengths and weakness of these approaches in terms of accuracy and efficiency. / Graduation date: 2005

First-pass success is important for cost-effective Monolithic Microwave and Millimeter-wave Integrated Circuits (MMMICs) since additional iterations to the MMMIC design are costly and take months to complete. In order to meet these goals, new levels of capabilities in the design, test and comprehensive simulations are required. The MMMICs employ microstrip line as a component connecting transmission medium as well as a distributed matching element. In a circuit layout, any deviation from straight transmission lines causes the introduction of discontinuity parasitics which must also be modeled as accurately as possible in order to predict the circuit performance. These discontinuities should either be taken into account or compensated for at the final stage of the design. A comparative study of different circuit simulators is undertaken to characterize microstrip discontinuities. Several microstrip discontinuities, such as bends, steps, and tees are examined and optimum compensated models are determined. / Master of Science

In order to simulate the Schottky Transistor and its effect on circuit applications, a computer model has been developed for the device. The focus of this research is the development of such a model for SPICE2 (a circuit simulation computer program) using a new method for model construction. This new method developes a model by approximating the mathematics of the simulation via perturbations and iterations. The model developed by the new method yields a minimum simulation accuracy of 65% in a variety of circuit applications. In comparison, a model developed by the conventional method, which uses measured data to complete the physical constructs of the SPICE2 model, offers the same margin of accuracy for the same circuits. So the new method is just as effective as the old method for the circuits that were tested. Yet with further development, the new method for model construction can be automated eliminating the time consuming and possibly inaccurate measurements of the old method that would discourage the use of SPICE2. So this research, in addition to developing two successful SPICE2 models for the Schottky Transistor, also introduces a new method for model construction that can make SPICE2 easier to use. / Master of Science