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1	Dense Stereo Reconstruction in a Field Programmable Gate Array Sabihuddin, Siraj 30 July 2008 (has links) Estimation of depth within an imaged scene can be formulated as a stereo correspondence problem. Software solutions tend to be too slow for high frame rate (i.e. > 30 fps) performance. Hardware solutions can result in marked improvements. This thesis explores one such hardware implementation that generates dense binocular disparity estimates at frame rates of over 200 fps using a dynamic programming formulation (DPML) developed by Cox et. al. A highly parameterizable field programmable gate array implementation of this architecture demonstrates equivalent accuracy while executing at significantly higher frame rates to those of current approaches. Existing hardware implementations for dense disparity estimation often use sum of squared difference, sum of absolute difference or other similar algorithms that typically perform poorly in comparison to DPML. The presented system runs at 248 fps for a resolution of 320 x 240 pixels and disparity range of 128 pixels, a performance of 2.477 billion DPS. stereo vision disparity depth fpga dynamic programming dense high frame rate pipeline dpml maximum likelihood parallel hardware field programmable gate array ssd sad computer vision machine vision stereo binocular high resolution high disparity large disparity large resolution two view 0544
2	Dense Stereo Reconstruction in a Field Programmable Gate Array Sabihuddin, Siraj 30 July 2008 (has links) Estimation of depth within an imaged scene can be formulated as a stereo correspondence problem. Software solutions tend to be too slow for high frame rate (i.e. > 30 fps) performance. Hardware solutions can result in marked improvements. This thesis explores one such hardware implementation that generates dense binocular disparity estimates at frame rates of over 200 fps using a dynamic programming formulation (DPML) developed by Cox et. al. A highly parameterizable field programmable gate array implementation of this architecture demonstrates equivalent accuracy while executing at significantly higher frame rates to those of current approaches. Existing hardware implementations for dense disparity estimation often use sum of squared difference, sum of absolute difference or other similar algorithms that typically perform poorly in comparison to DPML. The presented system runs at 248 fps for a resolution of 320 x 240 pixels and disparity range of 128 pixels, a performance of 2.477 billion DPS. stereo vision disparity depth fpga dynamic programming dense high frame rate pipeline dpml maximum likelihood parallel hardware field programmable gate array ssd sad computer vision machine vision stereo binocular high resolution high disparity large disparity large resolution two view 0544

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Dense Stereo Reconstruction in a Field Programmable Gate Array

Dense Stereo Reconstruction in a Field Programmable Gate Array