The concept of the Internet of Things is driven by advancements of the Internet with the interconnection of heterogeneous smart objects using different networking and communication technologies. With the rapidly increasing number of interconnected devices present in the life of a person, providing authentication and secure communication between them is considered a key challenge. The integration of Wireless Sensor Networks in the Internet of Things creates new obstacles due to the necessity of finding a balance between the resources utilization and the applied security solutions. In multicast group communications, the energy consumption, bandwidth and processing overhead at the nodes are minimized in comparison to a point-to-point communication system. To securely transmit a message in order to maintain confidentiality of the data and the user’s privacy, usually involves human interaction or the pre-agreement upon some key, the latter unknown to an external attacker. In this thesis, the author proposed an authentication protocol based on the similar context between the correct devices and lightweight computationally secure group-key establishment, avoiding any kind of human involvement. The goal is achieved by having the devices calculate a fingerprint from their ambient context and through a fuzzy commitment scheme generating a commitment respectively opening value which is used to generate a common secret key between them. The tests are effected on real world data accumulated from different environments. The proposed scheme is based on elliptic curve cryptography and cryptographic one-way accumulators. Its feasibility is analyzed by implementing the group key establishment phase in the Contiki operating system and by simulating it with the Cooja simulator. Furthermore, the applicability of the protocol is analyzed and justified by an analysis of the storage overhead, communication overhead, and energy consumption. The simulator shows an energy consumption of only 112 mJ per node for group key establishment. The results obtained in this thesis demonstrate the feasibility of the scheme, it’s computational, and communication costs are further comparable to other similar approaches.

Les travaux réalisés au cours de cette thèse se situent au carrefour de la cryptographie symétrique et du monde des environnements contraints. Le but de cette cryptographie, dite cryptographie à bas coût, est de fournir et d'évaluer des algorithmes symétriques pouvant être implémentés sur des systèmes très limités en ressources. Les contributions de cette thèse portent d'une part sur l'évaluation de la sécurité des registres à décalage à rétroaction avec retenue (FCSR) face à de nouvelles attaques et d'autre part sur une vision unifiée des différents schémas de Feistel généralisés (GFN) qui permet de mieux cerner leurs propriétés cryptographiques. Ces études ont donné lieu à deux nouveaux algorithmes à bas coût~; d'une part GLUON une fonction de hachage à base de FCSR et d'autre part le chiffrement LILLIPUT basé sur une famille étendant plus avant la notion de GFN. Enfin, une méthode générique permettant de réaliser des attaques différentielles en fautes sur des GFN est esquissée. / The work done during this Ph.D. lies at the crossroads of symmetric cryptography and constraints environments. The goal of such cryptography, called lightweight cryptography, is to propose and evaluate symmetric algorithms that can be implemented on very ressource limited devices. The contributions of this thesis are first on the security evaluations of feedback with carry shift registers (FCSR) to some new attacks and second on a unified vision of generalized Feistel networks (GFNs) that allows to better understand their cryptographic properties. These studies gave rise to two new lightweight algorithms: first GLUON a hash function based upon FCSRs and second the cipher LILLIPUT based on a family further extanding the notion of generalized Feistel network. Finally, a generic method for carrying out a differential fault attack on GFNs is outlined.

The dissertation thesis deals with cryptographic protocols for secure authentication of communicating parties, which are intended primarily for low-cost devices used in Internet of Things. Low-cost devices represent computationally, memory and power constrained devices. The thesis focuses mainly on the possibilities of using mathematically undemanding cryptographic resorces for ensuring integrity of transmitted dat, authenticity of and secured transmission of data on low-cost devices. The main goals of the thesis focus on the design of new advanced cryptographic protocols for ensuring integrity of transmitted data, authenticity, confidentiality of transmitted data between low-cost devices and authenticity with non-repudiation of done events. The thesis describes proposal of three authentication protocols, one unilateral authentication protocol and two mutual authentication protocols. The thesis also describes proposals of two protocols for secured transmission of data between two devices, one protocol without a proof of receipt data and one protocol with proof of receipt data. In this thesis is also performed a security analysis and a discussion to proposed protocols.

Le vol et la contrefaçon touchent toutes les sphères industrielles de nos sociétés. En particulier, les produits électroniques représentent la deuxième catégorie de produits la plus concernée par ces problèmes. Parmi les produits électroniques les plus touchés, on retrouve les téléphones mobiles, les tablettes, les ordinateurs mais aussi des éléments bien plus basiques comme des circuits analogiques ou numériques et les circuits intégrés. Ces derniers sont au coeur de la plupart des produits électroniques et un téléphone mobile peut être considéré comme contrefait s’il possède ne serait-ce qu’un seul circuit intégré contrefait. Le marché de la contrefaçon de circuits intégrés représente entre 7 et 10% du marché total des semi-conducteurs, ce qui implique une perte d’au moins 24 milliards d’euros en 2015 pour les entreprises concevant des circuits intégrés. Ces pertes pourraient s’élever jusqu’à 36 milliards d’euros en 2016. Il est donc indispensable de trouver des solutions pratiques et efficaces pour lutter contre la contrefaçon et le vol de circuits intégrés. Le projet SALWARE, financé par l’Agence Nationale de la Recherche et par la Fondation de Recherche pour l’Aéronautique et l’Espace, a pour but de lutter contre le problème de la contrefaçon et du vol de circuits intégrés et propose l’étude et la conception de matériels salutaires (ou salwares). En particulier, l’un des objectifs de ce projet est de combiner astucieusement plusieurs mécanismes de protection participant à la lutte contre la contrefaçon et le vol de circuits intégrés, pour construire un système d’activation complet. L’activation des circuits intégrés après leur fabrication permet de redonner leur contrôle au véritable propriétaire de la propriété intellectuelle. Dans ce manuscrit de thèse, nous proposons l’étude de trois mécanismes de protection participant à la lutte contre la contrefaçon et le vol de circuits intégrés. Dans un premier temps, nous étudierons l’insertion et la détection de watermarks dans les machines à états finies des systèmes numériques synchrones. Ce mécanisme de protection permet de détecter un vol ou une contrefaçon. Ensuite, une fonction physique non-clonable basée sur des oscillateurs en anneaux dont les oscillations sont temporaires est implantée et caractérisée sur FPGA. Ce mécanisme de protection permet d’identifier un circuit grâce à un identifiant unique créé grâce aux variations du processus de fabrication des circuits intégrés. Enfin, nous aborderons l’implantation matérielle d’algorithmes légers de chiffrement par bloc, qui permettent d’établir une communication sécurisée au moment de l’activation d’un circuit intégré / Counterfeiting and theft affects all industrial activities in our society. Electronic products are the second category of products most concerned by these issues. Among the most affected electronic products, we find mobile phones, tablets, computers as well as more basic elements such as analog and digital circuits or integrated circuits. These are the heart of almost all electronic products and we can say that a mobile phone is counterfeited if it has at least one counterfeit integrated circuit inside. The market of counterfeit integrated circuit is estimated between 7 and 10% of the global semi-conductors market, which represents a loss of at least 24 billion euros for the lawful industry in 2015. These losses could reach 36 billion euros in 2016. Therefore, there is an absolute necessity to find practical and efficient methods to fight against counterfeiting and theft of integrated circuits. The SALWARE project, granted by the French "Agence Nationale de la Recherche" and by the "Fondation de Recherche pour l’Aéronautique et l’Espace", aims to fight against the problem of counterfeiting and theft of integrated circuitsFor that, we propose to design salutary hardwares (salwares). More specifically,we propose to cleverly combine different protection mechanisms to build a completeactivation system. Activate an integrated circuit after its manufacturing helpsto restore the control of integrated circuits to the true owner of the intellectualproperty.In this thesis, we propose the study of three different protection mechanismsfighting against counterfeiting and theft of integrated circuits. First, the insertionand the detection of watermark in the finite state machine of digital and synchronoussystems will be studied. This mechanism helps to detect counterfeit or theftparts. Then, a physical unclonable function based on transcient effect ring oscillatoris implemented and characterized on FPGA. This protection mechanism is used toidentify integrated circuit with a unique identifier created thanks to the extractionof entropy from manufacturing process variations. Finally, we discuss the hardwareimplementations of lightweight block ciphers, which establish a secure communicationduring the activation of an integrated circuit

The development of dedicated cryptography systems for applications requiring low cost and consumption has been the current focus of research. This work addresses the design and performance analysis of cryptographic algorithms AES-128 (NIST standard), PRESENT-80 and CLEFIA-128 (ISO/IEC standard for Lightweight Cryptography), im-plemented in FPGA (Basys 3 Artix-7 - 28 nm technology) using VHDL. Performance metrics were analyzed and compared: occupied area in the FPGA, throughput (Mbps), efficiency (Mbps/slice), energy efficiency (Ws/bit) and current consumption. The metrics were obtained through the synthesis and implementation tool in FPGA, Vivado Design Suites (Xilinx), and by means of a current measurement prototype, which uses the Ada-fruit INA219 sensor board (Sensor from Texas Instruments) and microcontroller Arduino Uno (Atmega328 - Atmel). We also analyzed the graphical representation of current con-sumption through the mathematical model based on the Welch periodogram, applied on the current consumption variables during the data encryption process. The results show current curves that facilitate the identification and comparison of the algorithms. The data of area consumption, processing speed and efficiency in the FPGA obtained satisfactory performance in comparison with other implementations existing in the literature, besides providing relevant information to choose an algorithm of encryption. / O desenvolvimento de sistemas dedicados de criptografia, para aplicações que exigem baixo custo e consumo tem sido enfoque atual de pesquisas. Este trabalho aborda o projeto e análise de desempenho dos algoritmos de criptografia AES-128 (padrão NIST), PRESENT-80 e CLEFIA-128 (padrão ISO/IEC para Criptografia Leve), implementados em FPGA (Basys 3 Artix-7 – tecnologia de 28 nm), utilizando VHDL. Foram analisadas e comparadas as métricas de desempenho: área ocupada no FPGA, velocidade de proces-samento (Mbps), eficiência (Mbps/slice), eficiência energética (Ws/bit) e consumo de corrente. As métricas foram obtidas através da ferramenta de síntese e implementação em FPGA, Vivado Design Suites (Xilinx), e por meio de um protótipo de medição de corrente, que utiliza a placa sensor Adafruit INA219 (sensor da Texas Instruments) e microcontro-lador Arduino Uno (Atmega328 - Atmel). Foram analisadas também a representação grá-fica do consumo de corrente através do modelo matemático baseado no periodograma de Welch, aplicado sobre as variáveis de consumo de corrente durante o processo de encrip-tação de dados. Os resultados mostram curvas de corrente que facilitam a identificação e comparação dos algoritmos. Os dados de consumo de área, velocidade processamento e eficiência no FPGA obtiveram desempenho satisfatório, em comparação com outras im-plementações existentes na literatura, além de fornecer informação relevante para escolha de um algoritmo de criptografia.

Cette thèse aborde la conception et les contremesures permettant d'améliorer le calcul cryptographique matériel léger. Parce que la cryptographie (et la cryptanalyse) sont de nos jours de plus en plus omniprésentes dans notre vie quotidienne, il est crucial que les nouveaux systèmes développés soient suffisamment robustes pour faire face à la quantité croissante de données de traitement sans compromettre la sécurité globale. Ce travail aborde de nombreux sujets liés aux implémentations cryptographiques légères. Les principales contributions de cette thèse sont : - Un nouveau système d'accélération matérielle cryptographique appliqué aux codes BCH ; - Réduction de la consommation des systèmes embarqués et SoCs ; - Contre-mesures légères des attaques par canal auxiliaire applicables à l'algorithme de chiffrement reconfigurable AES ;- CSAC : Un pare-feu sécurisé sur la puce cryptographique ; - Attaques par analyse fréquentielle ; - Un nouveau protocole à divulgation nulle de connaissance appliquée aux réseaux de capteurs sans fil ; - OMD : Un nouveau schéma de chiffrement authentifié. / This thesis addresses lightweight hardware design and countermeasures to improve cryptographic computation. Because cryptography (and cryptanalysis) is nowadays becoming more and more ubiquitous in our daily lives, it is crucial that newly developed systems are robust enough to deal with the increasing amount of processing data without compromising the overall security. This work addresses many different topics related to lightweight cryptographic implementations. The main contributions of this thesis are: - A new cryptographic hardware acceleration scheme applied to BCH codes; - Hardware power minimization applied to SoCs and embedded devices; - Timing and DPA lightweight countermeasures applied to the reconfigurable AES block cipher; - CSAC: A cryptographically secure on-chip firewall; - Frequency analysis attack experiments; - A new zero-knowledge zero-knowledge protocol applied to wireless sensor networks; - OMD: A new authenticated encryption scheme.

Telemetry system, Optimisation, Sensoric networks, Smart Grid, Internet of Things, Sensors, Information security, Cryptography, Cryptography algorithms, Cryptosystem, Confidentiality, Integrity, Authentication, Data freshness, Non-Repudiation.