A coherent software environment simplifies maintenance - and using the same terminology facilitates communication and learning within the IT department.   Having a mixed and complex software environment could put strain on the IT department. Applications and databases needs to be somehow cataloged in case of system failure. While mapping applications to databases using a unified terminology might seem to be a good idea from the start, but when it comes to generating a data model of interconnections based on terminology - confusion will arise. This confusion could lead to misinterpretations, which in turn could lead to incidents.

Routers have to be fast enough to keep pace with increasing traffic data rate because of the increasing need for network bandwidth and processing. The switch fabric component of a router is a combination of hardware and software which moves the incoming packets to the outgoing ports. The access of the input ports to the switch fabric is controlled by a scheduler which affects the overall performance together with the fabric design. In this thesis we investigate two switch fabric and scheduler architectures, the well-known iSlip fabric scheduler and the Byte-Focal switch. We observe that these two architectures have different behaviors under different input traffic load ranges. The novel contribution of this thesis is a combined switch architecture which is composed of these two architectures that are implemented and run in parallel to selectively forward the packets with lower delay to the outputs to achieve an overall lower average delay. The design of the combined switch is carried out on FPGA and simulated. Our results show that the combined architecture has 100% throughput and a lower average delay compared to the Byte-Focal switch and the input-queued switch with iSlip. On the other hand, our combined switch uses more resources in FPGA than individual iSlip and Byte-Focal switch.