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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Fundamental studies of copper diffusion barriers

Engbrecht, Edward Raymond 28 August 2008 (has links)
Not available / text
2

Integration of thin film polymer ceramic nanocomposite capacitor dielectrics in SOP for decoupling applications in high speed digital communications

Hobbs, Joseph Martin 08 1900 (has links)
No description available.
3

Logic and algorithm partitioning

Khan, Shoab Ahmad 12 1900 (has links)
No description available.
4

Thermal modeling of hybrid microelectronics

Eades, Herbert H. 18 April 2009 (has links)
As the size of hybrid microelectronics is reduced, the power density increases and thermal interaction between heat-producing devices becomes significant. A nondimensional model is developed to investigate the effects of heat source interaction on a substrate. The results predict the maximum temperature created by a device for a wide range of device sizes, substrate thicknesses, device spacings, and external boundary conditions. They can be used to assess thermal interaction for preliminary design and layout of power devices on hybrid substrates. Previous work in this area typically deals with semi-infinite regions or finite regions with isothermal bases. In the present work, the substrate and all heat dissipating mechanisms below the substrate are modeled as two separate thermal resistances in series. The thermal resistance at the base of the substrate includes the bond to the heat sink, the heat sink, and convection to a cooling medium. Results show that including this external resistance in the model can significantly alter the heat flow path through the substrate and the spreading resistance of the substrate. Results also show an optimal thickness exists to minimize temperature rise when the Biot number is small and the device spacing is large. Tables are presented which list nondimensional values for maximum temperature and spreading resistance over a wide range of substrate geometries, device sizes, and boundary conditions. A design example is included to demonstrate an application of the results to a practical problem. The design example also shows the error that can result from assuming an isothermal boundary at the bottom of the substrate rather than a finite thermal resistance below the substrate. Several other models are developed and compared with the axisymmetric model. A one-dimensional model and two two-dimensional models are simpler than the axisymmetric model but prove to be inaccurate. The axisymmetric model is then compared with a full three-dimensional model for accuracy. The model proves to be accurate when sources are symmetrically spaced and when sources are asymmetrical under certain conditions. However, when the sources are asymmetrical the axisymmetric model does not always predict accurate results. / Master of Science
5

Plasma processing of advanced interconnects for microelectronic applications

Li, Yiming 08 1900 (has links)
No description available.
6

Parallel test techniques for multi-chip modules

Sasidhar, Koppolu 08 1900 (has links)
No description available.
7

Mechanical interactions at the interface of chemical mechanical polishing

Shan, Lei 12 1900 (has links)
No description available.
8

Design and fabrication of an underwater digital signal processor multichip module on low temperature cofired ceramic

Hayth-Perdue, Wendy 04 March 2009 (has links)
An Underwater Digital Signal Processor (UDSP) multichip module (MCM) was designed and fabricated according to specifications outlined by the Naval Surface Warfare Center (NSWC), Dahlgren Division. Specifications indicated that low temperature cofired ceramic (L TCC) technology be used to fabricate the MCM with surface dimensions of 2"x2". The top surface of the module was to be designed to enclose mounted components and bare dice, and the bottom surface was to be equipped with a 144 pin grid array (PGA). The LTCC technology selected for this application incorporated DuPont's 951 Green Tape™ and compatible materials and pastes. A mixed metal system using inner silver system and outer surface gold system was used. Harris Corporation's FINESSE MCMTM, a computer-aided design (CAD) tool, was used to design the surface components and produce the circuit layout. FREESTYLE MCM™, an autorouter, was used to accomplish the routing of the signal layers. The design information provided by FINESSE MCM™ and FREESTYLE MCM™ was utilized to produce the artwork necessary for fabrication. Fabrication of the module was accomplished in part using thick film processes to produce the conducting areas on each layer. The layers were stacked in a press, laminated, and fired. Conducting areas were screen printed on the top surface of the module for wire bonding and on the bottom surface of the module for pin attachment. The main objectives of this thesis work were to convert silicon UDSP MCM to ceramic using LTCC, learn a new tool in CAD design that incorporates an autorouter, apply the tool to design a MCM-C module, and to develop criteria to evaluate the MCM. Future research work includes conducting line continuity testing, materials evaluation to determine reactions at interfaces and via filling, and resistance and electrical crosstalk measurements on the module. / Master of Science

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