This master's thesis concerns the electrical activity and lifetime in compensated multicrystalline silicon wafers used for solar cell production.Resistivity profiles across grain boundaries have been obtained by a Four Point Probe (FPP). Profiles have been investigated in relation to minority carrier lifetime acquired by Microwave Photo Conductance Decay (uW-PCD).It has been found that a two-step process consisting of pre-annealing at either 600C or at 900C followed by phosphorus diffusion (P) gettering will increase the electrical activity of crystalline defects. It has been proposed that a P gettering step should follow directly after annealing for a better dissolution of metallic precipitates. Introduced defects in the material as a consequence of both pre-annealing at 900$^circ$C and of resistivity measurements before gettering, have possibly enhanced the phosphorus diffusion depth in the gettering process. The higher concentration of phosphorus has lead to an augmented lifetime in the material. Metallic impurity precipitation at defects, affecting the electrical activity and the minority carrier recombination rate, has been observed. A good correlation between grain structure, resistivity- and lifetime profiles has thus been established.