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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Improved Overlay Alignment of Thin-film Transistors and their Electrical Behaviour for Flexible Display Technology

Pathirane, Minoli 06 November 2014 (has links)
The integration of hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with plastic substrates enables emerging technologies such as flexible organic light emitting diode (OLED) displays. Current a-Si fabrication processes, however, create residual thin film stress that affects the underlying flexible substrate due to its high mismatch in the coefficient of thermal expansion resulting in a dimensional instability for fabricating TFTs on large area flexible substrates. The motivation of this thesis is to reduce this non-uniformity and improve fabrication throughput of bottom-gated inverted-staggered a-Si:H TFTs on flexible substrates. This thesis therefore encompasses the study of overlay misalignment on TFTs over 3 inch flexible substrates and investigates the electrical characteristics of the TFTs fabricated on plastic platforms. To reduce overlay misalignment of TFTs fabricated on flexible substrates, a plastic-on-carrier lamination process has been developed. The technique comprises of a polyimide tape to attach a 125 um-thick poly-ethylene-napthalate (PEN) flexible substrate to a rigid carrier. This process has been used to minimize stress induced strain of the PEN substrate during the fabrication process; strain, which has been observed after processing a-Si:H TFTs on free-standing substrates. This technique would in turn assist in fabricating uniform stacked-layers as required for a-Si:H TFT fabrication on the PEN substrates. Overlay misalignment is measured after each of the 5 consecutive lithographic steps at 4 corner-most edges of the PEN substrates using a standard optical microscope. Results have shown an overlay misalignment reduction from 21 um to 2 um on average based on the TFTs fabricated on free-standing flexible substrates while ensuring a centre alignment accuracy of +/- 0.5 um. Post fabrication adhesive removal to separate the PEN substrate from the rigid carrier has been accomplished by sample immersion in acetone. The results present a significant increase in fabrication throughput by reducing lithographic overlay misalignment such that the resolution of large-area flexible electronics would be enhanced. Electrical characteristics show the average performance of a-Si:H TFTs with an ON/OFF current ratio of 10^8, field effect mobility of ~0.8 cm^2/Vs, and gate leakage current of 10^-13 A.

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