<p>In this master thesis, a system has been designed that is used to detect the perforation holes on a film in a line-scanning film scanner. The film scanner is used to scan regular film taken by high-speed cameras during tests of for example missile launches or vehicle crash tests. </p><p>The system consists of a PLD that detects the perforation holes on the film using a signal from a digital line-scanning CCD camera. A main issue has been to make the detection procedure robust and independent of the different types of films encountered in real life situations. </p><p>The result from the detection is used to generate control signals to the film speed regulation mechanism inside the film scanner that then regulates the velocity of the film. To make the detection and regulation more sensitive, a part-of-line precision has been developed to calculate where, inside a line, the actual hole is positioned. </p><p>The system has been programmed in VHDL, synthesized, implemented and fitted into a Xilinx Spartan (XCS10-3-PC84) Field Programmable Gate Array (FPGA). The implementation has been simulated but not in real hardware.</p>

In this master thesis, a system has been designed that is used to detect the perforation holes on a film in a line-scanning film scanner. The film scanner is used to scan regular film taken by high-speed cameras during tests of for example missile launches or vehicle crash tests. The system consists of a PLD that detects the perforation holes on the film using a signal from a digital line-scanning CCD camera. A main issue has been to make the detection procedure robust and independent of the different types of films encountered in real life situations. The result from the detection is used to generate control signals to the film speed regulation mechanism inside the film scanner that then regulates the velocity of the film. To make the detection and regulation more sensitive, a part-of-line precision has been developed to calculate where, inside a line, the actual hole is positioned. The system has been programmed in VHDL, synthesized, implemented and fitted into a Xilinx Spartan (XCS10-3-PC84) Field Programmable Gate Array (FPGA). The implementation has been simulated but not in real hardware.