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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Design and study of phase locked loop for space applications in sub-micron CMOS technology

Ghosh, Partha Pratim. January 2009 (has links)
Thesis (Ph.D.)--University of Texas at Arlington, 2009.
32

Built-in self-test technique for high-speed phase-locked loops /

Kim, Seongwon. January 2001 (has links)
Thesis (Ph. D.)--University of Washington, 2001. / Vita. Includes bibliographical references (leaves 68-72).
33

Design of 1-V CMOS RF phase-locked loops and frequency synthesizers /

Leung, Chi Tak. January 2003 (has links)
Thesis (M.Phil.)--Hong Kong University of Science and Technology, 2003. / Includes bibliographical references. Also available in electronic version. Access restricted to campus users.
34

A fractional N frequency synthesizer for an adaptive network backplane serial communication system

Rangan, Giri N. K. 28 August 2008 (has links)
Not available / text
35

Low-noise and high-frequency clock generation core for VLSI CMOS integration

Robinson, Moises Emanuel 28 August 2008 (has links)
Not available / text
36

Performance study of uniform sampling digital phase-locked loopsfor [Pi]/4-differentially encoded quaternary phase-shift keying

黃俊賢, Vong, Chun-yin. January 1998 (has links)
published_or_final_version / Electrical and Electronic Engineering / Master / Master of Philosophy
37

Design and evaluation of a low-cost X-band synthesizer for LMDS applications /

Suvakov, Srdjan. January 1900 (has links)
Thesis (M. App. Sc.)--Carleton University, 2003. / Includes bibliographical references (p. 103-105). Also available in electronic format on the Internet.
38

Phase alignment of asynchronous external clock controllable devices to periodic master control signal using the Periodic Event Synchronization Unit

Ostrander, Charles Nicholas. January 2009 (has links) (PDF)
Thesis (MS)--Montana State University--Bozeman, 2009. / Typescript. Chairperson, Graduate Committee: Brock LaMeres. Includes bibliographical references (leaves 64-66).
39

Frequency dividers design for multi-GHz PLL systems

Barale, Francesco January 2008 (has links)
Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008. / Committee Chair: Laskar Joy; Committee Member: Cressler John; Committee Member: Tentzeris Emmanouil
40

Design techniques for radiation hardened phase-locked loops /

Nemmani, Anantha Nag. January 1900 (has links)
Thesis (M.S.)--Oregon State University, 2006. / Printout. Includes bibliographical references (leaves 47-48). Also available on the World Wide Web.

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