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This thesis investigates in detail a multilevel cascaded STATCOM employing indirect voltage control and square-wave control in combination as control strategy. An analytical steady-state model of a multilevel converter in harmonic domain is developed that can be used, for example, for resonance studies within a multilevel converter, or/and in studying interactions between a multilevel STATCOM and the host ac grid (like harmonic resonance). A systematic method is developed for STATCOM system design and optimization of STATCOM system parameters. The focus lies on minimizing losses, minimizing voltage. Total Harmonic Distortion (THD) and minimizing dc voltage ripple. Analytical formulae are presented that can be used to calculate the best value of each STATCOM system parameters. A discrete and an analytical dynamic converter model of a multilevel converter are developed to enable dynamic and/or stability studies. For the discrete model, the operating modes of a single-cell are analysed in detail and emulated using signal generators and integrators. The analytical multilevel converter model is segmented into a dynamic and static part in order to represent accurately all internal feedback connections. A general approach is developed for dynamic modelling of a STATCOM system. The dynamic system model has modular structure, and the controller gains are selected by analyzing the root locus of the analytical model to give optimum responses. The model is very accurate in the sub-synchronous range, and it is adequate for most control design applications and practical stability issues below 100 Hz. The controller robustness is also studied where the analytical STATCOM system model is used to perform eigenvalue analysis and to design controllers. Two different advanced control techniques are investigated and compared against the conventional method of proportional integral (PI) feedback voltage control.

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A serial search process achieved by reference code clock frequency offset suffers from a degraded autocorrelation function between the two codes because of the differing chip rates. In this thesis a computer simulation is used to investigate the code decorrelation, and the results are employed to obtain the mean acquisition time for the serial search process. The analysis is extended to include a CCD. type of matched filter following the integrate and dump detector, and to investigate the improvements in acquisition time that may be achieved over the simple serial search process if a search-lock strategy is employed. The effects of jitter and phase offset upon the error probability of the recovered data are investigated both theoretically and by measurement for the particular case of code modulation by sequence inversion keying. A tracking loop is presented that has been shown to maintain reference code phase offset to within ~ 0.01 chips under conditions where the noise on the communications link has made the recovered data unusable for most purposes. Finally, an application of spread spectrum techniques to small local area networks is presented, and a discussion of the effects of the crosscorrelation noise from the other user spreading codes upon the tracking loop's discriminator characteristic is given.

Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.

Thesis (M.S.)--West Virginia University, 2001. / Title from document title page. Document formatted into pages; contains viii, 73 p. : ill. Includes abstract. Includes bibliographical references (p. 71-73).

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