Based on a Ph.D. thesis in the Dept. of Electrical Engineering, 1965. / Bibliography: p. 67.

"MIT-3221-19." / Bibliography: p. 78-81. / Contract AT(30-1)-3221.

published_or_final_version / Electrical Engineering / Master / Master of Philosophy

No description available.

The Induction Linac System Experiment (ILSE) is a heavy-ion fusion (HIF) device that is being designed at Lawrence Berkeley Laboratory (LBL). The machine will be capable of accelerating 16 carbon ion beams, which are subsequently merged into 4 beams, to energies in the neighborhood of 10 MeV (10 million electron- volts). The purpose of the experiment will be to demonstrate the process of simultaneous acceleration and current amplification for a multiple beam accelerator configuration. If this process can be mastered, the beams produced by a machine such as ILSE would be used to implode and heat a deuterium-tritium (D-T) fuel pellet and produce a thermonuclear inertial confinement fusion (ICF) burn. This technology of achieving a fusion reaction using ion beams is referred to as Heavy-Ion Fusion (HIF) [1].

No description available.

Cellular and mobile communication markets, together with CMOS technology scaling, have made complex systems-on-chip integrated circuits (ICs) ubiquitous. Moving towards the internet of things that aims to extend this further requires ultra-low power and efficient radio communication that continues to take advantage of nanoscale CMOS processes. At the heart of this lie orthogonal challenges in both system and circuit architectures of current day technology. By enabling transceivers at center frequencies ranging in several tens of GHz, modern CMOS processes support bandwidths of up to several GHz. However, conventional narrowband architectures cannot directly translate or trade-off these speeds to lower power consumption. Pulse-radio UWB (PR-UWB), a fundamentally different system of communication enables this trade-off by bit-level duty-cycling i.e., power-gating and has emerged as an alternative to conventional narrowband systems to achieve better energy efficiency. However, system-level challenges in the implementation of transceiver synchronization and duty-cycling have remained an open challenge to realize the ultra-low power numbers that PR-UWB promises. Orthogonally, as CMOS scaling continues, approaching 28nm and 14nm in production digital processes, the key transistor characteristics have rapidly changed. Changes in supply voltage, intrinsic gain and switching speeds have rendered conventional analog circuit design techniques obsolete, since they do not scale well with the digital backend engines that dictate scaling. Consequently, circuit architectures that employ time-domain processing and leverage the faster switching speeds have become attractive. However, they are fundamentally limited by their inability to support linear domain-to-domain conversion and hence, have remained un-suited to high-performance applications. Addressing these requirements in different dimensions, two pulse-radio UWB receiver and a continuous-time filter silicon prototypes are presented in this work. The receiver prototypes focus on system level innovation while the filter serves as a demonstration vehicle for novel circuit architectures developed in this work. The PR-UWB receiver prototypes are implemented in a 65nm LP CMOS technology and are fully integrated solutions. The first receiver prototype is a compact UWB receiver front end operating at 4.85GHz that is aggressively duty-cycled. It occupies an active area of only 0.4 mm², thanks to the use of few inductors and RF G_m-C filters and incorporates an automatic-threshold-recovery-based demodulator for digitization. The prototype achieves a sensitivity of -88dBm at a data rate of 1Mbps (for a BER of 10^-3), while achieving the lowest energy consumption gradient (dP/df_data=450pJ/bit) amongst other receivers operating in the lower UWB band, for the same sensitivity. However, this prototype is limited by idle-time power consumption (e.g., bias) and lacks synchronization capability. A fully self-duty-cycled and synchronized UWB pulse-radio receiver SoC targeted at low-data-rate communication is presented as the second prototype. The proposed architecture builds on the automatic-threshold-recovery-based demodulator to achieve synchronization using an all-digital clock and data recovery loop. The SoC synchronizes with the incoming pulse stream from the transmitter and duty-cycles itself. The SoC prototype achieves a -79.5dBm, 1Mbps-normalized sensitivity for a >5X improvement over the state of the art in power consumption (375pJ/bit), thanks to aggressive signal path and bias circuit duty-cycling. The SoC is fully integrated to achieve RF-in to bit-out operation and can interface with off-chip, low speed digital components. Finally, switched-mode signal processing, a signal processing paradigm that enables the design of highly linear, power-efficient feedback amplifiers is presented. A 0.6V continuous-time filter prototype that demonstrates the advantages of this technique is presented in a 65nm GP CMOS process. The filter draws 26.2mW from the supply while operating at a full-scale that is 73% of the V_dd, a bandwidth of 70MHz and a peak signal-to-noise-and-distortion ratio (SNDR) of 55.8dB. This represents a 2-fold improvement in full-scale and a 10-fold improvement in the bandwidth over state-of-the-art filter implementations, while demonstrating excellent linearity and signal-to-noise ratio. To sum up, innovations spanning both system and circuit architectures that leverage the speeds of nanoscale CMOS processes to enable power-efficient solutions to next-generation wireless receivers are presented in this work.

Many essential processes and interactions on atomic and molecular scales occur at ultrafast timescales. The ability to measure and manipulate ultrashort pulses hold the key to probing and understanding these key processes that physicists, engineers, chemists and biologists study today. Measuring ultrashort pulses means that we measure both the intensity (which is a function of time) and the phase of the pulse in time. Or alternately we might measure spectrum and spectral phase (in the corresponding Fourier domain). In the early 1990's, the invention of FROG opened up the field of ultrashort measurement with it's ability to measure the complete pulse. Since then, there have been a whole host of pulse measurement techniques that have been invented to measure all sorts of ultrashort pulses. However, no variation of FROG nor any other fs pulse measurement technique, for that matter, has yet been able to completely measure arbitrary ultraweak femtosecond light pulses such as those found in nature. In this thesis, we will explore a couple of highly sensitive methods in a quest to measure ultraweak ultrashort pulses. We explore the use of Spectral Interferometry, a known sensitive technique as one possibility. We find that it has certain drawbacks that make it not necessarily suitable to tackle this problem. But in the course of our quest, we find that this technique is highly suitable for measuring 10s of picosecond-long shaped pulses. We discuss a couple of developments which make SI highly practical to use for such shaped pulse-measurements. We also develop a new technique which is a variation of FROG, based on the non-linearity of Difference Frequency Generation and Optical Parametric Amplification, which can amplify pulses as weak as a few hundred attojoules to be able to spectrally resolve them and measure the full intensity and phase of these pulses. This technique offers great potential to measure generalized ultraweak ultrashort pulses.

Thesis (M.S.)--Mississippi State University. Department of Electrical and Computer Engineering. / Title from title screen. Includes bibliographical references.