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RSFQ digital circuit design automation and optimisationMuller, Louis C. 03 1900 (has links)
Thesis (PhD)--Stellenbosch University, 2015. / ENGLISH ABSTRACT: In order to facilitate the creation of complex and robust RSFQ digital logic
circuits an extensive library of electronic design automation (EDA) tools is a
necessity. It is the aim of this work to introduce various methods to improve
the current state of EDA in RSFQ circuit design.
Firstly, Monte Carlo methods such as Latin Hypercube sampling and Sobol
sequences are applied for their variance reduction abilities in approximating
circuit yield. In addition, artificial neural networks are also investigated for
their applicability in modeling the parameter-yield space.
Secondly, a novel technique for circuit functional testing using automated
state machine extraction is presented, which greatly simplifies the logical verification
of a circuit. This method is also used, along with critical timing
extraction, to automatically generate Hardware Description Language(HDL)
models which can be used for high level circuit design.
Lastly, the Greedy Local search, Simulated Annealing and Genetic Algorithm
meta-heuristics were statistically compared in a novel manner using a
yield model provided by artificial neural networks. This is done to ascertain
their performance in optimising RSFQ circuits in relation to yield.
The variance reduction techniques of Latin Hypercube Sampling and Sobol
sequences were shown to be beneficial for the use with RSFQ circuits. For
optimisation purposes the use of Simulated Annealing and Genetic Algorithms
were shown to improve circuit optimisation for possible multi-modal search
spaces. An HDL model is also successfully generated from a complex RSFQ
circuit for use in high level circuit design which includes critical timing and
propagation latency.
All the techniques presented in this study form part of a software library
that can be further refined and extended in future work.
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Design and implementation of a RSFQ superconductive digital electronics cell libraryBakolo, Rodwell S. 12 1900 (has links)
Thesis (MScEng)--Stellenbosch University, 2011. / ENGLISH ABSTRACT: Rapid Single Flux Quantum (RSFQ) cells are key in the design of complex and applicable RSFQ
electronic circuits. These cells are low-level circuit elements that are used repeatedly to build
larger, applicable RSFQ circuitry.
Making these cells simple to layout and manufacture, but reliable for extensive use demands a
careful development process for RSFQ cells. Cell functionality is verified through simulations,
thereafter the cell is laid out in special software packages. Inductance of on-chip superconductor
structures is extracted through careful modelling with numerical field solver software.
A cell library has been developed by incorporating existing or published cells after further analysis
and optimization, as well as developing new cells. Cells that have been adapted into the
library include the Josephson transmission line (JTL), Splitter, Merger, D-Flip Flop (DFF),
T-Flip Flop (TFF), NOT, AND, OR and XOR, DC-SFQ and SFQ-DC and PTL Driver and
Receivers. New cells include NOR, NAND and XNOR. The cells were designed for the IPHT’s
RSFQ1D 1kA/cmª and Hypres’ 4.5kA/cmª processes.
The cells in the library have good bias current operating margins obtained through simulations
(> ±26%). All cells have all the parameters listed in the thesis including extracted inductance
values.
In order to have a complete and verified RSFQ cell library, cells have been sent for fabrication
at IPHT and Hypres facilities. These cells can now be tested on-chip, in the laboratory, to
establish functionality and practical bias current margins. All test signal patterns and bias
currents required for testing are defined to allow co-workers or collaborators to test the cells. / AFRIKAANSE OPSOMMING: "Rapid Single Flux Quantum" (RSFQ) selle is van sleutelbelang in die ontwerp van komplekse
en toepaslike RSFQ elektroniese stroombane. Hierdie selle is laevlak stroombaanelemente wat
herhaaldelik gebruik word om groter RSFQ bane mee te bou.
Versigtige ontwikkeling is nodig om hierdie selle eenvoudig vir uitleg en vervaardiging te hou
terwyl dit ook betroubaar is vir wye gebruik. Selfunksionaliteit word geverifieer deur middel van
simulasies, waarna selle vir vervaardiging uitgelê word in spesiale sagtewarepakette. Induktansie
van supergeleierstrukture op vervaardigde skyfies word deur versigtige modellering met behulp
van numeriese veldoplossingsagteware onttrek.
In hierdie tesis is ’n selbiblioteek ontwerp deur bestaande (gepubliseerde) selle verder te analiseer
en optimeer, en deur nuwe selle te ontwerp om die biblioteek volledig te maak. Selle wat aangepas
is vir hierdie biblioteek sluit die Josephson-Transmissielyn (JTL), Verdeler, Samevoeger, DWipkring
(DFF), T-Wipkring (TFF), NIE, EN, OF en XOF, asook die DC-SFQ en SFQ-DC
selle en Passiewe Transmissielyn (PTL) drywers en ontvangers in. Nuwe selle sluit die NOF,
NEN en XNOF hekke in. Die selle is ontwerp en uitgelˆe vir beide IPHT se RSFQ1D 1kA/cmª
en Hypres se4.5kA/cmª prosesse.
Die selle in die biblioteek toon goeie voorspanningstroom-werksmarges, soos verkry deur simulasie
(> ±26%). Parameters en berekende induktansies vir alle selle word in die tesis gelys vir
naslaandoeleindes.
Vir die daarstel van ’n volledige en geverifieerde RSFQ selbiblioteek is selontwerpe vir vervaardiging
na IPHT en Hypres gestuur. Aangesien vervaardiging slegs een maal per jaar by IPHT
gedoen word, is die skyfies egter nog nie beskikbaar nie. Na vervaardiging kan die skyfies egter
getoets word om selfunksionaliteit in die laboratorium te meet. Ten einde hierdie toetsing vir
enige medewerker te vergemaklik, word alle toetsparameters soos voorspanningstroom en intreeseinpatrone
in die tesis gedefinieer.
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Studies on Datapath Circuits for Superconductor Bit-Slice Microprocessors / 超伝導ビットスライスマイクロプロセッサのデータパス回路の研究Tang, Guang-ming 23 September 2016 (has links)
京都大学 / 0048 / 新制・課程博士 / 博士(情報学) / 甲第20033号 / 情博第628号 / 新制||情||109(附属図書館) / 33129 / 京都大学大学院情報学研究科通信情報システム専攻 / (主査)教授 髙木 直史, 教授 小野寺 秀俊, 教授 佐藤 高史 / 学位規則第4条第1項該当 / Doctor of Informatics / Kyoto University / DFAM
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A 10 GHz oversampling delta modulating analogue-to-digital converter implemented with hybrid superconducting digital logicFourie, Coenrad Johann 03 1900 (has links)
Thesis (MScEng)--University of Stellenbosch, 2001. / ENGLISH ABSTRACT: Rapid Single Flux Quantum (RSFQ) logic cells are discussed, and new cells
developed. The expected yield of every cell is computed through a Monte Carlo
analysis, and where necessary these cells are optimized for use in a complex system.
A mathematical study of the Josephson junction and SQUIDs (Superconducting
Quantum Interference devices) as switching elements precede a discussion on the
operation of RSFQ and COSL (Complementary Output Switching Logic.) These
logic families are implemented in low temperature niobium technology, and require
liquid helium cooling. A 10 GHz oversampling delta modulating analogue-to-digital
converter is then designed and constructed using RSFQ and COSL building blocks in
a hybrid configuration. The design emphasis is on devising ways to test the operation
of RSFQ with limited equipment. Yield analysis procedures on the complex system
are discussed, followed by a detailed discussion on the circuit layout and layout
problems. Software routines are developed to calculate the required dimensions of
layout structures. / AFRIKAANSE OPSOMMING: Rapid Single Flux Quantum (RSFQ) logiese selle word bespreek, en enkele nuwe
selle word ontwikkel. Die verwagte opbrengs, of kans dat 'n sel sal werk, word
bereken deur 'n Monte Carlo analise. Waar nodig word selle met behulp van die
analise verbeter vir gebruik in 'n komplekse stelsel. 'n Wiskundige studie van die
Josephson-vlak en SQUIDs (Superconducting Quantum Interference devices) word
gevolg deur 'n bespreking oor die werking van RSFQ en COSL (Complementary
Output Switching Logic.) Hierdie logiese families word geïmplementeer in
laetemperatuur niobiumtegnologie, en vereis vloeibare helium-verkoeling. 'n Deltamodulerende
analoog-na-digitale omsetter met 'n intree-monstertempo van 10 GHz
word ontwerp en vervaardig met 'n hibriede samestelling van RSFQ en COSL
boublokke. Die ontwerp fokus op maniere om die werking van RSFQ teen 10 GHz te
kan toets met die beperkte toerusting wat beskikbaar is. Opbrengsanalise op die
komplekse stelsel word bespreek, gevolg deur 'n volledige bespreking van die
stroombaanuitlegprosedure en uitlegprobleme. Roetines word in sagteware ontwikkel
om die nodige dimensies van uitlegstrukture te bereken.
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