International Telemetering Conference Proceedings / October 26-29, 1987 / Town and Country Hotel, San Diego, California / An architecture is described for Processing Multiple digital PCM telemetry streams. This architecture is implemented using a collection of Motorola mono-board microprocessor units (MPUs) in a single chassis called an Intermediate Processing Unit (IPU). Multiple IPUs can be integrated using a common input data bus. Each IPU is capable of processing a single PCM digital telemetry stream. Processing, in this context, includes conversion of raw sample count data to engineering units; computation of derived quantities from measurement sample data; calculation of minimum, maximum, average and cyclic [(maximum - minimum)/2] values for both measurement and derived data over a preselected time interval; out-of-limit, dropout and wildpoint detection; strip chart recording of selected data; transmission of both measurement and derived data to a high-speed, large-capacity disk storage subsystem; and transmission of compressed data to the host computer for realtime processing and display. All processing is done in realtime with at most two PCM major frames time latency.