This thesis focuses on combination of RITD (Resonant Inter-band Tunneling Diode) in MOS (Metal Oxide Semiconductor). Such new device gives architecture, applying to a latch theory and produces a stable, robust output working voltage. This output voltage can induce electric field to control drive current of said MOS. This design can guarantee high noise-defense, reduce power consumption, high speed switch and save space occupation. When gate voltage has longer slew time, the generated current working point may shift seriously due to noise interference. Importing this new architecture can form latch-phenomenon to keep working point into two stable states robustly, so this design can improve noise-defense ability of MOS. Because the announced device has lower working point voltage, it can reduce power consumption. During switch phase, said RITD can provide high current density to bring low slew rate of a conventional MOS up, thus the high speed switch is reached. Finally, this design of proposed device in this thesis is stack-like shape, then it can cut down space occupation efficiently to match futuristic trend of product profile.

This thesis proposes a new architecture, fabricating a pair of RITD (Resonant Interband Tunnel Diode) in the upper and lower position of drain and source terminals of a conventional MOS (Metal oxide Semiconductor), this design is completed by deposition, etching and spacer sequentially, manufacture process is a little complicate due to RITD implementation, but not difficult. This MOS based device, given to a pair of RITD in the upper and lower position of drain and source terminals, its equal model is like a conventional SRAM (Static Random Access Memory) which is completed by six MOS components at least, thus given advantages, like space occupation, cost consideration, still, due to high speed switch and low power consumption of RITD, this device also meet requirement of SRAM, because of different working mechanism, this device is more simple in interconnection and operation than that of a conventional SRAM, it is another improvement. This thesis will exhibit the manufacture process of this device and its equal circuit mode and working explanation.

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