Thesis (doctoral)--Universität, Darmstadt. / Title from e-book title screen (viewed Oct. 16, 2007). Description based on print version record. Includes bibliographical references ([203]-216).

Thesis (Ph. D.)--University of Washington, 1998. / Vita. Includes bibliographical references (leaves [103]-107).

Thesis (Ph. D.)--Lehigh University, 1999. / Includes vita. Includes bibliographical references (leaves 140-150).

Thesis (Ph. D.)--University of Texas at Austin, 2002. / Vita. Includes bibliographical references. Available also from UMI Company.

Thesis (doctoral)--University, Kiel, 2003.

In the past two decades, there has been a drastic increase in the mobile traffic, which is caused by the improved user experience with smart phones and its applications. In LTE system, the packet scheduler plays a vital role in the effective utilization of the resources. This field is not standardized and has immense scope of improvement, allowing vendor-specific implementation. The work presented in this thesis focuses on designing new scheduling algorithms for uplink and downlink to effectively distribute resources among the users. LTE scheduling can be categorized into two extremes, namely, Opportunistic scheduling and Fairness scheduling. The Best Channel Quality Indicator (BCQI) algorithm falls under the former category while Proportional Fairness (PF) algorithm under the later. BCQI algorithm provides high system throughput than PF algorithm, however, unlike BCQI algorithm, PF algorithm considers users with poor channel condition for allocation process. In this work, two new scheduling disciplines referred as Opportunistic Dual Metric (ODM) Scheduling Algorithm is proposed for uplink and downlink respectively. The objective of the algorithm is to prioritize the users with good channel condition for resource allocation, at the same time not to starve the users with poor channel conditions. The proposed algorithm has two resource allocation matrices, H1 and H2, where H1 is throughput-centric and H2 is fairness-centric. The uplink algorithm uses the two resource allocation matrices to allocate the resources to the users and to ensure contiguous resource allocation. The downlink algorithm is an extension of the proposed uplink algorithm avoiding uplink constraints. The downlink algorithm employs the two resource distribution matrices to provide an efficient resource allocation by expanding the allocation for the users considering intermittent resources. The performance of ODM is measured in terms of throughput, fairness. Additionally, the uplink algorithm is analysed in terms of transmit power. From the results it is observed that the proposed algorithms has better trade-off in terms of all the performance parameters than PF scheduler and BCQI scheduler.

This research is concerned with the development of effective solutions for the reduction of average cycle time at a wafer fabrication facility. The wafer fabrication environment is quite different from the usual flow shop or job shop environments, with a distinguishing feature being the reentrant flow of the lots through the system. Lots at different stages of their manufacturing cycle may revisit the machines. This gives rise to the need of effective policies to sequence lots through the system. The study is being conducted on a M/A-COM's wafer fabrication system. The facility on which the study is being conducted is based in Roanoke, VA. The facility consists of 92 machines and its products can be classified into six different types. The data required for each product such as routing, processing times, yield at each operation etc. have been acquired from the facility. Two methodologies have been developed to effect a reduction in the cycle time of the products at M/A-COM's facility. The first methodology is heuristic procedure based on the idea of reducing idle time on the bottleneck machine. The second methodology is based on mathematical programming. For the first methodology, the manufacturing system is simulated using AutoSchedAP, which is part of the AutoSimulations Inc. software package. The software enables the accurate modeling of the existing system using actual part routes, station definitions, operator definitions, shift calendars, input orders, machine breakdowns and processing and setup time distributions. The proposed approach, to reduce cycle time, is based on the principle of reduction of idle time at the bottleneck machine. The bottleneck machine controls the throughput of the system and any unnecessary idle time at the bottleneck leads to an increase in the average cycle time. The AutoSchedAP software enables the user to write custom scheduling rules using C++ and integrate it with the simulation model. The performance of the proposed procedure is compared with those of various other scheduling rules in the software. The second proposed methodology models the system as an integer program. The integer program reads the various machine and product data and establishes the optimal flow of the lots through the system. The integer program uses the start time of lots, at various operations, as variables and outputs the time at which each lot should be started at each operation. The integer program is solved using CPLEX, which is a linear and integer programming software. Presently, various methods are being analyzed to relax the integer program into an equivalent linear/nonlinear program, since solving an integer program consumes a lot of time, even for small problems. A third methodology has also been proposed. This methodology concerns the modeling of the system on the basis of a conjunctive-disjunctive graph. The main idea in this methodology is that the minimization of maximum lateness at each operation would result in the minimization of maximum cycle time of the overall system. Some preliminary results obtained are presented. Also, the work in progress is described. / Master of Science

No description available.

This thesis compares different mixed integer programming (MIP) formulations for sequencing of tasks in the context of avionics scheduling. Sequencing is a key concern in many discrete optimisation problems, and there are numerous ways of accomplishing sequencing with different MIP formulations. A scheduling tool for avionic systems has previously been developed in a collaboration between Saab and Linköping University. This tool includes a MIP formulation of the scheduling problem where one of the model components has the purpose to sequence tasks. In this thesis, this sequencing component is replaced with other MIP formulations in order to study whether the computational performance of the scheduling tool can be improved. Different scheduling instances and objective functions have been used when performing the tests aiming to evaluate the performances, with the computational times of the entire avionic scheduling model determining the success of the different MIP formulations for sequencing. The results show that the choice of MIP formulation makes a considerable impact on the computational performance and that a significant improvement can be achieved by choosing the most suitable one.

The resource demand on embedded devices is constantly growing. This is caused by the sheer explosion of software based functions in embedded systems, that are growing far faster than the resources of the single-core and multi-core embedded processors. As one of the limitation is the computing power of the processors we need to explore ways to use this resource more efficiently. We identified that during the run-time of the embedded devices the resource demand of the software functions is permanently changing dependent on the device situation. To enable an embedded device to take advantage of this dynamic resource demand, the allocation of the software functions to the processor must be handled by a scheduler that is able to evaluate the resource demand of the software functions in relation to the device situation. This marks a change in embedded devices from static defined software systems to dynamic software systems. Above that we can increase the efficiency even further by extending the approach from a single device to a distributed or networked system (many-core system). However, existing approaches to deal with dynamic resource allocation are focused on individual devices and leave the optimization potential of manycore systems untouched. Our concept will extend the existing Hierarchical Asynchronous Multi-Core Scheduler (HAMS) concept for individual devices to many-core systems. This extension introduces a dynamic situation aware scheduler for many-core systems which take the current workload of all devices and the system-situation into account. With our approach, the resource efficiency of an embedded many-core system can be increased. The following paper will explain the architecture and the expected results of our concept.