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Coupled electron gases fabricated by in situ ion beam lithography and MBE growthBrown, Karl January 1994 (has links)
No description available.
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Characterisation of the physical behaviour of GaAs MESFETsBarton, T. M. January 1988 (has links)
No description available.
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The computer simulation of a GTO thyristorMurray, Eamonn January 1992 (has links)
No description available.
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Deep level transient spectroscopy of III-IV semiconductorsArbaoui, Amar January 1989 (has links)
No description available.
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Spatial and temporal characteristics of optical bistability in indium antimonideYoung, James January 1987 (has links)
No description available.
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Failure mechanisms in MOS devicesAmerasekera, Ekanayake A. January 1986 (has links)
Continuous and pulsed voltage stressmg of metal oxide semiconductor (MOS) transistors and capacitors has been mvestigated. The expenmental work followed a survey of failure mechanisms in semiconductor devices which Identified Electrical Overstress Damage (EOS)/Electrostatic Discharge (ESD) damage as the most frequent cause of failure, accounting for over 50% of all damage observed. The survey itself, covered all aspects of semiconductor reliability including reliability modelling and quality assurance. A qualitative model of oxide breakdown in MOS structures was developed as a result of the experimental work. Two different mechanisms have been proposed for continuous and pulsed voltage breakdown. Continuous voltage breakdown simulating EOS conditions, was temperature and voltage dependent. The long time-scales involved, lead to a model whereby breakdown IS the result of conduction of charge earners through the oxide, via electron traps and impunty Sites with energies m the forbidden gap. Pulsed voltage breakdown simulating ESD, was voltage dependent but not temperature dependent. The very short time-scales involved indicate that breakdown is the direct result of electron transport m the oxide conduction band. Electrons are inJected into the conduction band via quantum-mecharucal tunnelling from the cathode. Both mechanisms were found to be dependent on the surface charge concentratiOn of the Silicon and, therefore, polanty dependent. The models explain this effect by analysing the charge injection process under high electric fields.
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Study on semiconductor devices by high density plasma chemical vapor depositionChen, Yu-Ting 08 July 2005 (has links)
In this thesis, high density plasma chemical vapor deposition (HDPCVD) is used to fabricate novel multiple quantum well structure of light emitting diodes (LEDs) and charge storaged layers of SONOS nonvolatile semiconductor memories (NVSMs).
On the study of the light emitting diodes (LEDs) technology, wide band gap hydrogenated amorphous silicon carbide and porous silicon carbide has blue or green luminescence are currently being investigated for applications in optoelectronic devices. However, due to the indirect band gap character, the quantum efficiency of these LEDs is very low. In our experiment, we fabricate 5-periods hydrogenated amorphous silicon carbide multiple quantum well structure to enhance the luminescence efficiency. In our study, there are some following notable features: (1) The a-SixC1-x multiple quantum well structure prepared by high density plasma chemical vapor deposition and it shows visible photoluminescence at room temperature. (2) After fluorine ions implantation and thermal annealing, The PL energy of a-SixC1-x multiple quantum well shift to high energy. (3) The PL intensity of SiO2-barrier SixC1-x multiple quantum well is larger than SiNx-barrier. (4) The film adheres well to glass or Si wafer even at low deposition temperature, e.g. 200 0C by high density plasma chemical vapor deposition.
On the study of the silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMs) technology, the SONOS is a multi-dielectric device consisting of an oxide-nitride-oxide (ONO) sandwich in which charge storage takes place in discrete traps in the silicon nitride layer. In addition to silicon nitride as the storage layer, we have studied the oxide/SiC:O/oxide sandwiched structures and thermal oxidation of SiC layer as a storage layer by HDPCVD processes. In our study, there are some following notable features: (1) From the capacitance-voltage and current-voltage characteristics of oxygen-incorporated silicon carbide with different oxygen content, it is observed that the memory window is decreased with increasing the oxygen content. By controlling the oxygen content, a higher breakdown voltage can be achieved. (2) In the study of the oxidation of SiC, it is found that low temperature (800 ¢J) oxidized SiC shows a larger memory window than that of the high temperature (925 ¢J) oxidized SiC by high density plasma chemical vapor deposition.
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The Role of the Collisional Broadening of the States on the Low-Field Mobility in Silicon Inversion LayersJanuary 2017 (has links)
abstract: Scaling of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) towards shorter channel lengths, has lead to an increasing importance of quantum effects on the device performance. Until now, a semi-classical model based on Monte Carlo method for instance, has been sufficient to address these issues in silicon, and arrive at a reasonably good fit to experimental mobility data. But as the semiconductor world moves towards 10nm technology, many of the basic assumptions in this method, namely the very fundamental Fermi’s golden rule come into question. The derivation of the Fermi’s golden rule assumes that the scattering is infrequent (therefore the long time limit) and the collision duration time is zero. This thesis overcomes some of the limitations of the above approach by successfully developing a quantum mechanical simulator that can model the low-field inversion layer mobility in silicon MOS capacitors and other inversion layers as well. It solves for the scattering induced collisional broadening of the states by accounting for the various scattering mechanisms present in silicon through the non-equilibrium based near-equilibrium Green’s Functions approach, which shall be referred to as near-equilibrium Green’s Function (nEGF) in this work. It adopts a two-loop approach, where the outer loop solves for the self-consistency between the potential and the subband sheet charge density by solving the Poisson and the Schrödinger equations self-consistently. The inner loop solves for the nEGF (renormalization of the spectrum and the broadening of the states), self-consistently using the self-consistent Born approximation, which is then used to compute the mobility using the Green-Kubo Formalism. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017
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Novel Electrical Measurement Techniques for Silicon DevicesJanuary 2015 (has links)
abstract: Semiconductor manufacturing economics necessitate the development of innovative device measurement techniques for quick assessment of products. Several novel electrical measurement techniques will be proposed for screening silicon device parameters. The studied parameters range from oxide reliability, and carrier lifetime in MOS capacitors to the power MOSFET reverse recovery.
It will be shown that positive charge trapping is a dominant process when thick oxides are stressed through the ramped voltage test (RVT). Exploiting the physics behind positive charge generation/trapping at high electric fields, a fast I-V measurement technique is proposed that can be used to effectively distinguish the ultra-thick oxides' intrinsic quality at low electric fields.
Next, two novel techniques will be presented for studying the carrier lifetime in MOS Capacitor devices. It will be shown that the deep-level transient spectroscopy (DLTS) can be applied to MOS test structures as a swift mean for screening the generation lifetime. Recombination lifetime will also be addressed by introducing the optically-excited MOS technique as a promising tool.
The last part of this work is devoted to the reverse recovery behavior of the body diode of power MOSFETs. The correct interpretation of the LDMOS reverse recovery is challenging and requires special attention. A simple approach will be presented to extract meaningful lifetime values from the reverse recovery of LDMOS body-diodes exploiting their gate voltage and the magnitude of the reverse bias. / Dissertation/Thesis / Doctoral Dissertation Materials Science and Engineering 2015
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Mobility Modeling of Gallium Nitride NanowiresJanuary 2017 (has links)
abstract: Semiconductor nanowires have the potential to emerge as the building blocks of next generation field-effect transistors, logic gates, solar cells and light emitting diodes. Use of Gallium Nitride (GaN) and other wide bandgap materials combines the advantages of III-nitrides along with the enhanced mobility offered by 2-dimensional confinement present in nanowires. The focus of this thesis is on developing a low field mobility model for a GaN nanowire using Ensemble Monte Carlo (EMC) techniques. A 2D Schrödinger-Poisson solver and a one-dimensional Monte Carlo solver is developed for an Aluminum Gallium Nitride/Gallium Nitride Heterostructure nanowire. A GaN/AlN/AlGaN heterostructure device is designed which creates 2-dimensional potential well for electrons. The nanowire is treated as a quasi-1D system in this work. A self-consistent 2D Schrödinger-Poisson solver is designed which determines the subband energies and the corresponding wavefunctions of the confined system. Three scattering mechanisms: acoustic phonon scattering, polar optical phonon scattering and piezoelectric scattering are considered to account for the electron phonon interactions in the system. Overlap integrals and 1D scattering rate expressions are derived for all the mechanisms listed. A generic one-dimensional Monte Carlo solver is also developed. Steady state results from the 1D Monte Carlo solver are extracted to determine the low field mobility of the GaN nanowires. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2017
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