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Nanoindentation study of buckling and friction of silicon nanolinesLuo, Zhiquan 20 October 2009 (has links)
Silicon-based nanostructures are essential building blocks for nanoelectronic
devices and nano-electromechanical systems (NEMS). As the silicon device size
continues to scale down, the surface to volume ratio becomes larger, rendering the
properties of surfaces and interfaces more important for improving the properties of the
nano-devices and systems. One of those properties is the friction, which is important in
controlling the functionality and reliability of the nano-device and systems. The goal of
this dissertation is to investigate the deformation and friction behaviors of single
crystalline silicon nanolines (SiNLs) using nanoindentation techniques.
Following an introduction and a summary of the theoretical background of
contact friction in Chapters 1 and 2, the results of this thesis are presented in three
chapters. In Chapter 3, the fabrication of the silicon nanolines is described. The
fabrication method yielded high-quality single-crystals with line width ranging from
30nm to 90nm and height to width aspect ratio ranging from 10 to 25. These SiNL
structures have properties and dimensions well suited for the study of the mechanical and friction behaviors at the nanoscale. In Chapter 4, we describe the study of the mechanical
properties of SiNLs using the nanoindentation method. The loading-displacement curves
show that the critical load to induce the buckling of the SiNLs can be correlated to the
contact friction and geometry of SiNLs. A map was built as a guideline to describe the
selection of buckling modes. The map was divided into three regions where different
regions correlate to different buckling modes including Mode I, Mode II and slidingbending
of SiNLs. In Chapter 5, we describe the study of the contact friction of the SiNL
structures. The friction coefficient at the contact was extracted from the loaddisplacement
curves. Subsequently, the frictional shear stress was evaluated. In addition,
the effect of the interface between the indenter and SiNLs was investigated using SiNLs
with surfaces coated by a thin silicon dioxide or chromium film. The material of the
interface was found to influence significantly the contact friction and its behavior. Cyclic
loading-unloading experiments showed the friction coefficient dramatically changed after
only a few loading cycles, indicating the contact history is important in controlling the
friction behaviors of SiNLs at nanoscales. This thesis is concluded with a summary of the
results and proposed future studies. / text
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LATERAL DIFFUSION LPE GROWTH OF SINGLE CRYSTALLINE SILICON FOR PHOTOVOLTAIC APPLICATIONSLi, Bo 10 1900 (has links)
<p>A modified liquid phase epitaxy (LPE) technique, called lateral diffusion LPE (LDLPE), is invented for low cost and high efficiency solar cell applications. Potentially, LDLPE is able to produce single crystalline silicon wafers directly from the raw material, rather than cutting wafers from single crystalline silicon ingots, therefore reducing the cost by avoiding the cutting and polishing processes.</p> <p>By using a traditional LPE method, the silicon is epitaxially grown on the silicon substrate by cooling down the saturated silicon/indium alloy solution from a high temperature. The silicon precipitates on the substrate since its solubility in the indium solvent decreases during the cooling process. A SiO<sub>2</sub> mask is formed on the (111) substrate with 100µm wide opening windows as seedlines. Silicon is epitaxially grown on the seedline and forms thick epitaxial lateral overgrowth (ELO) layers on the oxide mask. The ELO layers are silicon strips with an aspect ratio of 1:1 (width: thickness), approximately. The strip grows both laterally in width and vertically in thickness.</p> <p>The concept of LDLPE is to intentionally block the silicon diffusion path from the top of the seedline, but leave the lateral diffusion path from the bulk indium melt to the seedline. Theoretically, by using the LDLPE method, the silicon strip should have a larger aspect ratio, because the laterally growth in width is allowed but the vertical growth in thickness is limited. In addition, single crystalline silicon wafers can be achieved if the strip grows continuously.</p> <p>A graphite slide boat is designed to place a plate over the seedline to block the diffusion path of silicon atoms from the top of the seedline. After one growth cycle, silicon strips grown by LDLPE are wider than LPE strips but have similar thicknesses. The aspect ratios are increased from 1:1 to a number larger than 2:1. A Monte-Carlo random walk model is used to simulate the change of LDLPE strip aspect ratio caused by placing a plate over the seedline.</p> <p>Wetting seedline by indium melt is very critical for a successful growth. Due to the small space between the plate and seedline and the surface tension of the indium melt, the indium melt cannot flow into the small space. A pre-wetting technique is used to fill the space prior to loading the graphite boat into the tube furnace and solve the wetting problem successfully.</p> <p>The structure of a LDLPE silicon strip is characterized by X-ray diffraction. The electrical properties are characterized by Hall Effect measurement and photoconductive decay measurement. LDLPE silicon strips are (111) orientated single crystal and are the same orientation as the substrate. For the growth temperature of 950°C, the LDLPE strip has an estimated effective minority carrier lifetime of 30.9µs. The experimental results demonstrate that LDLPE is feasible for photovoltaic application if continuous growth and scaling up can be achieved.</p> / Doctor of Philosophy (PhD)
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