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A number of parameters have been identified as characteristic of the walking pattern in patients with INPH. Most of these have been identified through qualitative surveys and manually conducted test batteries. In order to obtain quantitative, standardized and objective measures, which enable studies based on larger patient populations and comparable results, there is a need for a user-friendly system that can measure specific key parameters over time in a reliable manner in everyday clinical work. Step height, width and the variability in the gait cycle are such parameters which are interesting research areas for this group of patient. Problems with balance and gait are very common in other patient groups as well, particularly in neurological diseases such as Parkinson's disease, multiple sclerosis and stroke. This is the reason that the development of this gait analyzer is performed. Giving access to a simple and objective method for estimating gait and balance ability in clinical routine investigations would increase the ability to provide the right kind of treatment, confirm treatment results, and conducting larger research studies. Therefore, this equipment can contribute to the assessment of diseases which contain impaired gait. As a first test of the usability and for the validation of accuracy and repeatability of the equipment a group of healthy volunteers was used. Results from tests on healthy subjects show god repeatability between measurements, for step width at normal gait the difference was -0,2 ±0,34 cm (mean, ±SD) and step height 0,69 ±3,34 cm. The stride time variability in the healthy group where very small 0,00048 ±0,00028 s2 with a difference between test of 0,000019 ±0,00038 s2. Three pilot patients have been tested where we have clearly seen indications of increased stride time variability and reduced step height.

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Silicon photonics is emerging as a potential field to achieve optical interconnects towards the realization of ultra high bandwidth. The indirect band-gap property of silicon still remains as a big challenge to incorporate silicon photonic active device, for example, silicon-based laser. In the Laboratory of Semiconductor Materials at KTH, a monolithic integration platform based on nano-epitaxial lateral overgrowth (nano-ELOG) technique has been proposed to integrate III-V semiconductor materials with silicon for light source application. The integration process involves uneven surface morphology at different stages. The surfaces of the indium phosphide seed layer on silicon used for ELOG, the mask deposited on it (the silicon/silicon dioxide waveguide) and the ELOG indium phosphide layer grown on it prior to laser growth are often rough. In this thesis work, we have optimized chemical mechanical polishing (CMP) technique in order to achieve an even surface. The same procedure is also necessary to reach the optimal thickness of different layers to enable effective coupling of light from the laser source into the waveguide. CMP of indium phosphide to obtain an average surface roughness of < 1 nm has been optimized by a two-step polishing using different slurries; it results in a step height of ca 3 nm. Similarly the surface of silicon/silicon dioxide “waveguide” has also been optimized with the roughness of ~ 0.5 nm. In the latter case, a step height of 40 nm is retained and this increase with respect to InP is identified to be mainly due to limitations of the polishing machine which is different from that used for indium phosphide. The reduction in step heights with polishing time is analyzed and compared with an existing theoretical model. Our results are in good qualitative agreement with the model. The optimized surface morphology obtained in this work was tested for its suitability for integration. For this evaluation, InP was grown by ELOG in a hydride vapour phase epitaxy reactor with and without CMP of the involved surfaces. The surface after CMP yields layers of better surface morphology with fewer defects as revealed by atomic force microscopy, surface profilometer and cathodoluminescence analysis. The results indicate that the CMP process is useful for monolithic integration for silicon photonics.

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