In many digital signal processing applications, we often need some special function units that can compute complicated arithmetic functions such as reciprocal, square-root, base-2 logarithm, power of 2, trigonometric functions, etc. The most popular design approaches to compute these single-value functions are based on look-up tables (LUT) with interpolation. In general, there are two different types of LUT-based method: piecewise and multipartite. As the required bit accuracy increases, the size of LUT increases exponentially. In this thesis, we will develop a generator that can automatically synthesize suitable hardware to compute these special arithmetic functions given the required bit accuracy. In particular, higher-order piecewise method will be supported to reduce the table size for high-accuracy applications. The synthesized arithmetic units are used in the design of a vertex shader for 3D graphics application.

Lookup-table (LUT)-based method is a common approach used in all kinds of research topics. In this dissertation, we present several new designs for table-based function evaluation and table-based error correcting coding. In Chapter 3, a new function evaluation method, called two-level approximation, is presented where piecewise degree-one polynomials are used for initial approximation in the first level, followed by the refined approximation for the shared normalized difference functions in the second level. In Chapter 4, we present a new non-uniform segmentation method that searches for the optimal segmentation scheme with the different design goals of minimizing either ROM, total area, or delay. In Chapter 5, a new design methodology for table-based function evaluation is presented. Unlike previous approaches that usually determine the bit widths by assigning allowable errors for individual hardware components, the total error budget of our new design is considered jointly in order to optimized the bit widths of all the hardware components, leading to significant improvements in both area and delay. Finally, in Chapter 6, the similar table-based concept is used in the design of error correcting encoder using the modified polynomial of the Lagrange interpolation formula, resulting in smaller critical path delay and lower power consumption.