In the thesis, a methodology alternative to existing methods of digital systems design with increased dependability implemented into FPGA is presented, new features which can be used in the implementation and testing of these systems are demonstrated. The research is based on the use of FPGA partial dynamic reconfiguration for the design of fault tolerant systems. In these applications, the partial dynamic reconfiguration can be used as a mechanism to correct the fault and recover the system after the fault occurrence. First, the general principles of diagnostics, testing and digital systems dependability are presented including a brief description of FPGA components and their architectures. Next, a survey of currently used methods and techniques used for the design and implementation of fault tolerant systems into FPGA is described, especially the methods used for fault detection and localization, their correction, together with the principles of evaluating fault tolerant systems design quality.  The most important part of the thesis is seen in the description of the design methodology, implementation and testing of fault tolerant systems implemented into FPGAs which uses SRAMs as the configuration memory. First, the methodology of developing and automated checker components design for digital systems and communication protocols is presented. Then, a reference architecture of a dependable system implemented into FPGA is demonstrated including several fault tolerant architectures based on the use of partial dynamic reconfiguration as the mechanism of fault correction and the recovery from it. The principles of controlling the reconfiguration process are described together with the description of the test platform which allows to test and verify the design of fault tolerant systems based on the methodology presented in the thesis. The experimental results and the contribution of the thesis are discussed in the conclusions.

Nowadays the development speed of new software products is a key to success and it is not important whether the aim is to make customer's urges satisfied or get ahead of one's competitors and fill the market gap. Because of the increase of development speed the demands on the saving process of software quality are increasing. There are two types of tools that are supporting the process of software quality assurance. Firstly, we talk about comprehensive testing tools of commercial character that usually include many functions, but their purchase is extremely expensive. On the other hand there are open-source tools that are available for free, they function on many kinds of operating systems and it is possible to modify them. Unfortunately their functions are basically focused on a certain subset of controlling the software quality assurance. Company TRASK solution a.s. has decided to change this current situation, so it asked competence centre Software Quality Assurance at the University of Economics in Prague in order to create Integrated Testing Node (ITN) that would combine the advantages of open-source tools. Moreover, it would offer broad range of functions as commercial solution. The purpose of this thesis is to describe relevant phases of the process of creating the Integrated Testing Node from the factual and methodical point of view. This aim is divided into partial aims included task analysis and the proposal of solving system, open-source products portfolio analysis, choice of the most convenient tools for following integration, choosing the method of information system building, evaluating the feedback from a client and the proposal of future development of this tool. As far as the biggest contribution of this thesis is concerned, it is the realisation of ITN project that can be used during information classes at the University of Economics in Prague. Furthermore, it can be used as the control of software quality in commercial companies.

In the present, there are several programmes used for testing in this company. This may lead to a certain mutual inconsistency of the data within the system, as well as to the decrease of orientation and efficiency among the employees, that are in charge of the quality of the developed applications. There is approximately 200 employees in the IT department who focus on the development of the software. The biggest percentage has, though, the position of the tester. The aim of this thesis is to analyse the situation and the testing process in the selected bank company. Simultaneously, we would like to reach certain possibilities to unify the process of testing.

Technology Narrowband IoT is a representative LPWA (Low Power Wide Area) tech-nology that due to its promising features aims for demands of the Internet of Thingsapplications for autonomous data sending from sensors in areas of poor mobile coverage.For such applications, it is beneficial to firstly map properties of communication technol-ogy in areas of intended use and evaluate whether or not is this technology applicable.This Master thesis deals with the design of the hand-held measuring device for evaluationof Narrowband IoT properties. The output of this thesis is firstly comparison of LPWAtechnologies secondly, design of the mentioned device and verification of its functional-ity. And in last part description of measurement of transmission delay for delay-tolerantapplications. Transmission delay is a critical parameter for delay-tolerant applications.Such an application can be, for example, smart electrometers for which there is definedmaximal allowed transmission delay of 10 seconds and therefore it is desirable to evalu-ate whether or not is the deployment of the communication technology Narrowband IoTsuitable in the intended area for delay-tolerant or even for delay-intolerant applications.

The main goal of the thesis is to provide its readers information about external audit and describe individual phases and audit procedures of auditing the financial statements. The practical part of the thesis is then focused on application of theoretical knowledge on practical example. Audit is performed for area of long-term tangible and intangible assets in the selected company. The conclusion of the thesis includes deficiencies identified during the audit and proposed solutions of these deficiencies.

This thesis was selected due to establishing of universal platform for USBTMC remote instrumentation and constructing a laboratory DC power supply for hobby use. This thesis is focused on design and realization of regulated linear DC power supply. At first thesis mentions kinds of DC power supplies and kinds of interfaces used for test and measurement instruments. Thesis continues by describing of blocks of a developed linear DC power supply with an USB interface following the USBTMC specification for remote control. Thesis ends by realization of the regulated linear DC power supply with USBTMC interface. It was achieved acceptable results. Communication between PC and Control module works well as same as communication between Control module and Power supply module. Maximum output ranges of voltage and current are 40V and 3A. Big interference on auxiliary supply rail decreases accuracy.

In the thesis, a methodology alternative to existing methods of digital systems design with increased dependability implemented into FPGA is presented, new features which can be used in the implementation and testing of these systems are demonstrated. The research is based on the use of FPGA partial dynamic reconfiguration for the design of fault tolerant systems. In these applications, the partial dynamic reconfiguration can be used as a mechanism to correct the fault and recover the system after the fault occurrence. First, the general principles of diagnostics, testing and digital systems dependability are presented including a brief description of FPGA components and their architectures. Next, a survey of currently used methods and techniques used for the design and implementation of fault tolerant systems into FPGA is described, especially the methods used for fault detection and localization, their correction, together with the principles of evaluating fault tolerant systems design quality.  The most important part of the thesis is seen in the description of the design methodology, implementation and testing of fault tolerant systems implemented into FPGAs which uses SRAMs as the configuration memory. First, the methodology of developing and automated checker components design for digital systems and communication protocols is presented. Then, a reference architecture of a dependable system implemented into FPGA is demonstrated including several fault tolerant architectures based on the use of partial dynamic reconfiguration as the mechanism of fault correction and the recovery from it. The principles of controlling the reconfiguration process are described together with the description of the test platform which allows to test and verify the design of fault tolerant systems based on the methodology presented in the thesis. The experimental results and the contribution of the thesis are discussed in the conclusions.

Building physics as a branch of architecture must ensure an indoor comfort of each user and inhabitant of a building object. This involves, acoustics, indoor thermal conditions and among others also daylighting and artificial lighting of buildings. Light as a particle and an electromagnetic wave, is required by the different aspects of the human organism. It allows the living beings to see, influences skin and bones, the biorhythms, etc. Therefore, it is necessary for the engineering community to predict the correct illuminance and luminance levels acting insides. The thesis deals with such issues. More precisely, it assesses the quality of design tools and methodologies, either against CIE reference cases described in CIE 171/2006 and against real measurements done over the working plane of an indoor space located in the attic of Building D of the Institute of Building Structures, Faculty of Civil Engineering, Brno University of Technology, too. The tools tested throughout the solution of the dissertation did involve three computer programs: RADIANCE, WDLS v3.1 and WDLS v4.1, and one numerographical approach, namely the Daniljuk’s innovated methodology (sometimes even combined with the theories of BRS). In addition several software’s have had been created alongside the process assessment, just to mention the “RADIANCE Script”, “RADIANCE Data Evaluation Script” or “MuuLUX“. The later was written as a communication software allowing the connection of the KONICA-MINOLTA T10 illuminance meter to a computer with the aim of data collection while long term observation. The solution did also require the establishment of a measuring element for the determination of the light reflectance values of surfaces. The solutions, results and conclusions do describe how well did the design approaches deal while predicting the resulting awaited daylight factor levels in points over the working plane.

Diplomová práce se zabývá možnosti kalibrace experimentálního testovacího zařízení. Zejména se věnuje návrhu termálního matematického modelu popisujícího tepelné procesy uvnitř zařízení v průběhu měření tepelné vodivosti vzorku. První část práce je věnována seznámení se s testovacím zařízením, jeho limity a principem měření. Popisuje řešení třetí verze testovací komory, společně s nezbytnými úpravami, provedenými za účelem zajištění předepsaných simulačních podmínek. Zmiňuje také potřebu a důvody kalibrace. Druhá část je především zaměřená na návrh kalibračních vzorků a termálního modelu. Uvádí definované požadavky a konečné vlastnosti vyrobených vzorků. Matematický model prezentuje postup výpočtu zjištěných tepelných ztrát a poukazuje na možnosti jejich zpřesnění. Testování kalibračních vzorků bylo provedeno na nově zprovozněné třetí verzi testovací komory. Naměřené výsledky poslouží k ladění termálního modelu, nezbytného k dokončení kalibračního procesu, který umožní přikročení k další fázi testování v experimentální komoře.

This thesis deals with the utilization of new principles of characterization of gate capacitances for sigma-delta modulators. Sigma-delta modulators are the integral part of sigma-delta analog-to-digital converters. The proposed new method is characterized by high resolution and modest requirements for laboratory equipment. It allows characterizing capacitances whose values are within the range which is used in sigma-delta modulators. The thesis contains description of the new method, the analysis of measurement accuracy and experimental results.