<p>The goal of this bachelor thesis has been to investigate if the laboratory exercises in the courses digital filters and linear systems can be moved from matlab to a digital signal processor. The processor is a TMS320C6713 floating point processor mounted on a development board.</p><p> </p><p>The original laboratories have been implemented and analyzed and some suggested changes have been presented for the digital filter laboration. For the laboration in linear systems, the exercise can be implemented as it is today. Furthermore, a transmultiplexer has been implemented and tested for real time execution.</p><p> </p><p>Finally, an application programming interface has also been implemented, with common functions, used in the laboratories.</p><p> </p>

The goal of this bachelor thesis has been to investigate if the laboratory exercises in the courses digital filters and linear systems can be moved from matlab to a digital signal processor. The processor is a TMS320C6713 floating point processor mounted on a development board.   The original laboratories have been implemented and analyzed and some suggested changes have been presented for the digital filter laboration. For the laboration in linear systems, the exercise can be implemented as it is today. Furthermore, a transmultiplexer has been implemented and tested for real time execution.   Finally, an application programming interface has also been implemented, with common functions, used in the laboratories.

<p>As the complexity of Very Large Scale Integration (VLSI) circuits dramatically increases by improvements of technology, there is a huge interests to shift different applications from analog to digital domain. While there are many platform available for this shift, Field Programmable Gate Arrays (FPGAs) hold an attractive position because of their performance, power consumption and configurability. Comparing with Application Specific Integrated Circuit (ASIC) and Digital Signal Processor (DSP), FPGA stands in the middle. It is easier to implement a function on FPGA than ASIC which is to perform a fixed operation. Although, DSP can implement versatile functions, its computational power is not high enough to support the high data rate of FPGA.</p><p>This report is the outcome and result of a master thesis at University of Linköping, Sweden. This report tries to cover both theoretical and hardware aspects of implementation of a Farrow structure for sample rate conversion on FPGA.</p><p>The intention of this work was to contribute to what is nowadays the main focus of communication engineers: designing flexible radio systems. Flexible radio systems are interactive and dynamic by definition. That is why a low-cost, flexible multimode terminal is crucially important to support different telecommunication standards and scenarios. In this thesis, FPGA implementation of complete Farrow system is presented. Matlab/Simulink, and VHDL are used in this thesis work as the prime software.</p>

As the complexity of Very Large Scale Integration (VLSI) circuits dramatically increases by improvements of technology, there is a huge interests to shift different applications from analog to digital domain. While there are many platform available for this shift, Field Programmable Gate Arrays (FPGAs) hold an attractive position because of their performance, power consumption and configurability. Comparing with Application Specific Integrated Circuit (ASIC) and Digital Signal Processor (DSP), FPGA stands in the middle. It is easier to implement a function on FPGA than ASIC which is to perform a fixed operation. Although, DSP can implement versatile functions, its computational power is not high enough to support the high data rate of FPGA. This report is the outcome and result of a master thesis at University of Linköping, Sweden. This report tries to cover both theoretical and hardware aspects of implementation of a Farrow structure for sample rate conversion on FPGA. The intention of this work was to contribute to what is nowadays the main focus of communication engineers: designing flexible radio systems. Flexible radio systems are interactive and dynamic by definition. That is why a low-cost, flexible multimode terminal is crucially important to support different telecommunication standards and scenarios. In this thesis, FPGA implementation of complete Farrow system is presented. Matlab/Simulink, and VHDL are used in this thesis work as the prime software.